Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
1999-03-04
2001-10-02
Huff, Mark F. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S313000, C430S314000
Reexamination Certificate
active
06296988
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to a method for making a semiconductor device, and more particularly, to a method for forming a metal pattern for a wiring of a semiconductor device.
2. Description of the Related Art
FIGS. 1A through 1E
illustrate, in cross-section, a portion of a semiconductor device as it undergoes conventional processing acts in sequence for forming a metal pattern for a wiring of a semiconductor device.
Referring first to
FIG. 1A
, a first refractory metal film
2
, a metal wiring film
3
, and a second refractory metal film
4
are, in this order, deposited on a semiconductor substrate
1
. A photoresist film
5
is then deposited on the second refractory metal film
4
.
Next, as shown in
FIG. 1B
, a photoresist pattern
5
′ is formed by etching the photoresist film
5
through a photolithography process.
Next, the metal films
2
,
3
and
4
are etched using the photoresist pattern
5
′ as a mask, thereby obtaining metal patterns
2
′,
3
′ and
4
′ as shown in FIG.
1
C. At this point, the etching process is performed by a dry-etching method using a gas mixture such as BCl
3
/Cl
2
/N
2
. During this process, polymer impurity layer
6
is created on an upper surface of the photoresist pattern
5
′ as well as on side walls of the metal patterns
2
′,
3
′ and
4
′; (see FIG.
1
C). Furthermore, part of the metal wiring pattern
3
′ is corroded by reacting with the Cl
2
of the gas mixture of BCl
3
/Cl
2
/N
2
.
Next, to remove the photoresist pattern
5
′ and part of the polymer impurity layer
6
, the substrate
1
is heat-treated within an ashing chamber at a temperature of about 150-250° C. However, since the polymer impurity layer
6
encloses most of the photoresist pattern
5
′, the photoresist pattern
5
′ is not completely removed as shown in FIG.
1
D. At this point, the remaining photoresist pattern
5
′ becomes hardened by the relatively high temperature of about 150-250° C. used in the ashing process.
Following the above, the polymer impurity layer
6
is removed by a chemical wet-cleaning process. However, at this point, since it is impossible to remove the remaining photoresist pattern
5
′ as a result of the hardening of the same during the ashing process, as shown in
FIG. 1E
, the remaining photoresist pattern
5
′ is left on the metal pattern
4
′ even after the chemical wet-cleaning process. This remaining photoresist pattern
5
′ makes it difficult to carry out a subsequent metal layer formation process.
SUMMARY
An embodiment of the present invention provides a method for forming a metal wiring pattern of a semiconductor device, including the acts of: forming a metal film on a semiconductor substrate; forming a photoresist pattern on the metal film; removing a portion of the metal film, where the mask defines the removed portion; and removing a portion of the photoresist pattern using an under-ashing process. In an embodiment, the under-ashing process is conducted at a temperature of approximately 40-50° C. so as to prevent the remaining photoresist pattern from hardening.
REFERENCES:
patent: 6015761 (2000-01-01), Merry et al.
patent: 6027861 (2000-02-01), Yu et al.
patent: 6032682 (2000-03-01), Verhaverbeke
Anam Semiconductor Inc.
Huff Mark F.
Mohamedulla Saleha R.
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