Method for forming a low temperature polysilicon CMOS thin...

Details Method for forming a low temperature polysilicon CMOS thin... Method for forming a low temperature polysilicon CMOS thin...

2005-02-08

2005-02-08

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S151000, C438S154000, C257S350000, C257S351000

Reexamination Certificate

active

06852577

ABSTRACT:
A method for forming a low temperature polysilicon complementary metal oxide semiconductor thin film transistor (LTPS CMOS TFT). It utilizes six photo-etching processes (PEP) to form the LTPS CMOS TFT that comprises an N type metal oxide semiconductor thin film transistor (NMOS TFT) having lightly doped drains (LDD) and a P type metal oxide semiconductor thin film transistor (PMOS TFT).

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patent: 6614052 (2003-09-01), Zhang
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patent: 6743649 (2004-06-01), Yamazaki et al.
patent: 6777254 (2004-08-01), Yamazaki et al.

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