Method for forming a high dielectric constant material

Details Method for forming a high dielectric constant material Method for forming a high dielectric constant material

2001-04-16

2002-09-10

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S761000, C438S762000, C438S765000, C438S770000, C438S778000, C438S779000, C438S787000

Reexamination Certificate

active

06448192

ABSTRACT:

FIELD OF THE INVENTION
The field of this invention is semiconductor devices and, more particularly, is the formation of high dielectric constant materials.
BACKGROUND OF INVENTION
As semiconductor structures shrink, the scaling of the gate dielectric is necessary. Traditionally the gate dielectric consists of SiO
2
. SiO
2
, however, will not suffice for the dimensions needed for future technology. Alternately, high dielectric constant (high K) materials are being pursued as replacements for SiO
2
. During the processing of high K materials, interfacial SiO
2
formed on the Si substrate is difficult to prevent or remove. This SiO
2
interfacial layer is typically around 10 to 15 Angstroms in thickness. A thinner layer of SiO
2
such as 7 Angstroms is desirable in order to provide a good Si—SiO
2
interface with minimal interfacial states. One way to decrease the thickness of the SiO
2
layer is to lower the temperature of the oxygen flow rate during formation of the high K material. This results, however, in an oxygen deficient or “leaky” film. An O
2
anneal is therefore needed to decrease the leakage of the high K material, but the O
2
anneal will cause the SiO
2
layer to increase in thickness. In addition, the processing at low temperature increases non-uniformity of the SiO
2
layer and results in a poor quality high K material. Therefore, a need in the industry exists for a process for forming a high K material with a thin, high quality SiO
2
layer.


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