Etching a substrate: processes – Etching of semiconductor material to produce an article...
Patent
1997-04-03
1998-11-10
Powell, William
Etching a substrate: processes
Etching of semiconductor material to produce an article...
216 24, 216 39, 438705, 438745, H01L 2100
Patent
active
058338705
ABSTRACT:
A method for forming a highly dense quantum wire, the method comprising the steps of: depositing a dielectric mask having dielectric patterns on the top surface of a semiconductor (100) substrate; forming the dielectric patterns in parallel to a (011) orientation on the semiconductor substrate; exposing a (111)B side and a(111)B side by chemical etching a selected region between the patterns so that the semiconductor substrate has a dove-tail shape; forming a buffer layer on the dove-tail semiconductor substrate; forming the first barrier layer on the buffer layer; forming a well layer on the first barrier layer; and forming the second barrier layer on the well layer.
REFERENCES:
patent: 4652333 (1987-03-01), Carney
patent: 4676863 (1987-06-01), Furuyama et al.
Wugen Pan, et al., Composition profile of an AIGaAs epilayer on a V-grooved substrate rown by low pressure metalorgnic vapor phase epitaxy, 14 Aug. 1995, pp. 959-961.
N. Usami, et al., Realization of crescent-shaped SiGe quantum wire structures on a V-groove patterned Si substrate by gas-source Si molecular am epitaxy, 15 Nov. 1993, pp. 2789-2791.
Wugen Pan, et al., Rectangular AIGaAs/AIAs Quantum Wires Using Spontaneous Vertical Quantum Wells, Feb. 1996, pp. 1214-1216.
Kim Sung Bock
Lee El Hang
Ro Jeong Rae
Electronics and Telecommunications Research Institute
Powell William
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