Electrical computers and digital processing systems: memory – Address formation – Hashing
Reexamination Certificate
2000-09-28
2002-12-10
Portka, Gary J (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Hashing
C711S210000, C711S108000
Reexamination Certificate
active
06493813
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of computer memory systems and more particularly to a method of forming a hashing code.
BACKGROUND OF THE INVENTION
Most computer memory today uses Random Access Memory (RAM) to store information. Each element of data has its own address. The Central Processing Unit (CPU) provides a singular address and can either read or write data at that location. This architecture is sequential in nature, requiring several processing steps to manipulate data because its location must be determined first.
Another data management scheme is associative memories. Typically associative memories use hash codes that return an arbitrary memory location for a data element (key). Hashing codes are commonly used in large database applications. Unfortunately, present hashing codes suffer from a large number of collisions as the memory store approaches 70% full. The collision management requires external memory management schemes that require extra processing and memory space.
Thus there exists a method of forming a hashing code that reduces or eliminates collisions.
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Ramakrishna, “A Simple Perfect Hashing Method for Static Sets”, IEEE, 1992.*
Schneider, G. Michael, “Concepts in Data Structures and Software Development”, West Publishing Co., 1991.
Brandin Christopher Lockton
Direen Harry George
Halling Dale B.
NeoCore, Inc.
Portka Gary J
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