Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2001-07-02
2002-09-10
Nguyen, Viet Q. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S151000
Reexamination Certificate
active
06448166
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming a gate for semiconductor devices, and in particular to an improved method for forming a gate for semiconductor devices by using a TaO
x
N
y
film as a gate oxide film.
2. Description of the Background Art
In general, in highly integrated semiconductor devices, a gate oxide film of a device having line widths of 0.1 &mgr;m or less has an effective oxide thickness of below about 40 Å in order to reduce in short channel effects and to provide efficient control of channels. However, such a thin gate oxide film increases the leakage current due to a direct tunneling, which causes deterioration in the transistor properties and a refresh time relating to the resultant capacitor.
Accordingly, in a conventional art, a Ta
2
O
5
film, which is a metal oxide film having a high dielectric constant, is used as the gate oxide film of the transistor, rather than the conventional SiO
2
film.
FIG. 1A
illustrates a conventional method for forming a gate for semiconductor devices. As shown in
FIG. 1A
, a SiO
2
or SiON film
2
is formed on a semiconductor substrate where a device isolation film (not shown) has been formed.
A Ta
2
O
5
film
3
having a high dielectric constant is formed on the SiO
2
or SiON film
2
by a chemical vapor deposition (CVD). Here, the Ta
2
O
5
film
3
is a metal oxide film having a high dielectric constant. The Ta
2
O
5
film
3
is formed by using Ta(C
2
H
5
O)
5
as a raw material and O
2
or N
2
O as a reaction gas.
Thereafter, a TiN film or WN film
4
is deposited on the Ta
2
O
5
film
3
to form a metal barrier, and a conductive polysilicon film or metal film
5
is deposited thereon as the gate electrode material.
Although not illustrated, a subsequent process for forming the transistor is performed according to a known method.
However, when the metal gate electrode is employed on the Ta
2
O
5
film, as shown in
FIG. 1B
, a threshold voltage is over +1V due to a work function of the metal gate.
In order to reduce the threshold voltage, phosphorus is used in a channel ion implantation process, instead of boron. When phosphorus is ionimplanted, a buried channel is formed in an NMOS transistor, not a surface channel.
In addition, containments comprising carbon atoms, carbon compounds and H
2
O exist in the Ta
2
O
5
film formed by the reaction of Ta(C
2
H
5
O)
5
and O
2
or N
2
O, which increases the leakage current of the gate and degrades the dielectric properties.
Therefore, in order to prevent an increased leakage current level and degraded the dielectric properties, the conventional method requires an additional oxidation process for stabilizing the unstable stoichiometry by oxidizing vacancy Ta atoms in the Ta
2
O
5
film, and also typically requires two or three high and/or low temperature annealing processes after the deposition.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a method for forming a gate for semiconductor devices which can prevent a leakage current by using a TaON film having a stable stoichiometry as a gate oxide film.
In order to achieve the above-described object of the present invention, there is provided a method for forming a gate for semiconductor devices, including the steps of: providing a semiconductor substrate where a device isolation film has been formed; depositing an SiO
2
or SiON film on the semiconductor substrate; depositing an amorphous TaO
x
N
y
film on the SiO
2
or SiON film; performing a low temperature annealing process to improve quality of the amorphous TaO
x
O
y
film; performing a high temperature annealing process in ex-situ to remove organic substances and nitrogen in the amorphous TaO
x
N
y
film, and crystallize the amorphous TaO
x
O
y
film; and depositing a metal barrier film on the crystallized TaO
x
N
y
film, and depositing a polysilicon film or metal film for a gate electrode on the metal barrier film.
In addition, there is provided a method for forming a gate for semiconductor devices, including the steps of: providing a semiconductor substrate where a device isolation film has been formed; growing an SiO
2
or SiON film on the semiconductor substrate; forming an amorphous TaO
x
N
y
film on the SiO
2
or SiON film; performing a low temperature annealing process on the amorphous TaO
x
N
y
film by using plasma or UV; removing oxygen vacancies and organic substances in the amorphous TaO
x
O
y
film; crystallizing the amorphous TaO
x
N
y
film by performing a high temperature annealing process, such as a rapid thermal process (RTP); and forming a metal barrier film on the crystallized TaO
x
N
y
film, and forming a polysilicon film or metal film for a gate electrode on the metal barrier film.
REFERENCES:
patent: 6156600 (2000-12-01), Chao et al.
patent: 6171900 (2001-01-01), Sun
patent: 6287910 (2001-09-01), Lee et al.
patent: 6303481 (2001-10-01), Park
Cho Heung Jae
Lim Kwan Yong
Park Dae Gyu
Hynix / Semiconductor Inc.
Nguyen Viet Q.
Nhu David
Pillsbury & Winthrop LLP
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