Method for forming a floating gate memory with polysilicon...

Details Method for forming a floating gate memory with polysilicon... Method for forming a floating gate memory with polysilicon...

2005-09-01

2009-08-04

Pham, Thanhha (Department: 2894)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S684000, C438S753000, C257SE21575

Reexamination Certificate

active

07569468

ABSTRACT:
Methods and apparatus are described to facilitate forming memory devices with low resistance polysilicon local interconnects that allow a smaller array feature size and therefore facilitate forming arrays of a denser array format. Embodiments of the present invention are formed utilizing a wet etch process that has a high selectivity, allowing the deposition and etching of polysilicon local interconnects to source regions of array transistors. By providing for a local interconnect of polysilicon, a smaller source region and/or drain region can also be utilized, further decreasing the required word line spacing. Low resistance polysilicon local source interconnects can also couple to an increased number of memory cells, thereby reducing the number of contacts made to an array ground.

REFERENCES:
patent: 5416048 (1995-05-01), Blalock
patent: 5892285 (1999-04-01), Gonzalez
patent: 5937287 (1999-08-01), Gonzalez
patent: 5945348 (1999-08-01), Blalock
patent: 6001685 (1999-12-01), Kim
patent: 6159788 (2000-12-01), Jenq
patent: 6211012 (2001-04-01), Lee et al.
patent: 6287978 (2001-09-01), Becker
patent: 6309975 (2001-10-01), Wu
patent: 6337244 (2002-01-01), Prall
patent: 6420250 (2002-07-01), Cho
patent: 6420786 (2002-07-01), Gonzalez
patent: 6433384 (2002-08-01), Hashimoto
patent: 6501114 (2002-12-01), Cho
patent: 6627913 (2003-09-01), Chen
patent: 6664611 (2003-12-01), Chen
patent: 2002/0000423 (2002-01-01), Becker

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