Fishing – trapping – and vermin destroying
Patent
1993-12-17
1995-01-24
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 60, 437919, H01L 2170, H01L 2700
Patent
active
053842774
ABSTRACT:
A method of forming a MOS DRAM cell having a trench capacitor in which the strap connection to the trench capacitor, the source, drain, and isolation are all raised above the surface of the single crystal silicon includes the steps of forming the trench capacitors, depositing a blanket gate stack including the gate oxide and a set of gate layers, and then depositing isolation members in apertures etched in the gate stack using the gate oxide as an etch stop. The same sidewalls that are used to form an LDD source and drain combine with nitride sidewalls on a gate contact aperture to separate a gate contact from source and drain contacts.
REFERENCES:
patent: 4688063 (1987-08-01), Lu et al.
patent: 4873205 (1989-10-01), Critchlow et al.
patent: 4983544 (1991-01-01), Lu et al.
patent: 5272102 (1993-12-01), Hur et al.
Hsu Louis L.
Mii Toshio
Ogura Seiki
Shepard Joseph F.
Chaudhuri Olik
International Business Machines - Corporation
Tsai H. Jey
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