Method for forming a conductive plug between conductive...

Details Method for forming a conductive plug between conductive... Method for forming a conductive plug between conductive...

2000-06-22

2002-04-16

Bowers, Charles (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S633000, C438S637000, C438S673000, C438S713000, C257S752000, C257S774000

Reexamination Certificate

active

06372638

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to integrated circuit manufacturing, and more particularly to, a method for forming tungsten contact plugs in a void-free manner.
BACKGROUND OF THE INVENTION
In the integrated circuit (IC) industry, contacts between polysilicon layers and/or metal layers are sometimes formed using tungsten plugs. As advances are made in lithographic processing and etch technology, the radial opening of an integrated circuit contact continues to shrink while the vertical depth of integrated circuit contacts have been increasing. This increase in contact aspect ratio (depth/radius) creates reliability and manufacturing problems when using tungsten deposition and chemical mechanical polishing (CMP) technology to form tungsten plugs.
The problems arise when tungsten (W) continues in the industry to be used to plug large aspect ratio contacts is illustrated in prior art
FIGS. 1-3
. As is known in the art, tungsten deposition suffers from highly nonconformal deposition characteristics, also referred to as inconsistent step-coverage. The adverse effects of this non-conformal nature of tungsten deposition is illustrated in
FIGS. 1-3
.
In
FIG. 1
, a contact structure
10
is formed by initially providing a base layer
12
. A first conductive layer
14
is formed on top of the base layer
12
. Layer
14
is lithographically patterned and etched. A dielectric layer
16
is formed overlying the patterned layer
14
. The dielectric layer
16
is then patterned then etched to form a contact opening
18
which has a substantially uniform radius X at all elevations through the contact
18
of FIG.
1
.
FIG. 1
illustrates the beginning of the tungsten deposition process which forms an initial tungsten layer
20
a.
In
FIG. 1
, tungsten is deposited in a highly nonconformal manner. In other words, top surfaces of the dielectric layer
16
will accumulate tungsten material at a much faster rate than the bottom comers of the contact opening
18
. Therefore, the shape of the initial stages of tungsten deposition is accurately illustrated in
FIG. 1
whereby top portions of the dielectric layer
16
have accumulated a greater thickness of tungsten than lower portions of the contact opening
18
.
In
FIG. 2
, tungsten deposition continues to transform the thinner tungsten layer
20
a
in
FIG. 1
to a thicker tungsten layer
20
b
in FIG.
2
. The tungsten, which continues to deposit in
FIG. 2
, is also nonconformal and deposits more along the top exposed surfaces of layer
20
a
and less along the sidewalls and bottom portion of the contact
18
. Due to this nonconformal deposition, many contacts formed using a tungsten deposition process will form keyholes or voids
22
as illustrated in FIG.
2
. These voids form from the nonconformal deposition nature of tungsten “pinching off” the top opening in the contact hole. The voids
22
resulting from this nonconformal step coverage of tungsten create depressed yields, nonfunctional IC die from electrical open circuits, and electromigration failures over time. Therefore, the presence of the voids
22
in high aspect ratio contacts are disadvantageous and a significant problem for integrated circuit (IC) processing.
FIG. 3
illustrates that a chemical mechanical polishing (CMP) operation is used to form the tungsten plug
20
c
illustrated in FIG.
3
. Note that the void
22
is still present within the contact structure after polishing and therefore is still problematic in the final integrated circuit (IC) device.
Therefore, a need exists for a IC contact formation process which continues to utilize nonconformal tungsten deposition processes while resulting in reduced or totally eliminated void formation.


REFERENCES:
patent: 4908333 (1990-03-01), Shimokawa et al.
patent: 4970573 (1990-11-01), Roberts et al.
patent: 4997518 (1991-03-01), Madokoro
patent: 5049975 (1991-09-01), Ajika et al.
patent: 5082801 (1992-01-01), Nagata
patent: 5189506 (1993-02-01), Cronin et al.
patent: 5854140 (1998-12-01), Jaso
patent: 6143648 (2000-11-01), Rodriguez et al.
Kaanta et al., “Dual Damascene: A ULSI Wiring Technology,” VMIC Conference, 9 pgs. (1991).
Kaufman et al., “Chemical-Mechanical Polishing for Fabricating Patterned W Metal Features as Chip Interconnects,” J. Electrochem. Soc. vol. 138, No. 11, pp. 3460-3464 (1991).

Affiliated with

Also associated with

Rating

Method for forming a conductive plug between conductive... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for forming a conductive plug between conductive..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming a conductive plug between conductive... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2818479