Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1998-12-15
2001-01-30
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S711000, C438S723000, C438S724000, C438S743000, C438S744000
Reexamination Certificate
active
06180532
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor fabrication process, and more particularly, to a method for forming a borderless contact hole.
2. Description of Related Art
In order to achieve higher integration of a semiconductor device, a borderless contact process has been implemented in the most current semiconductor fabrication processes. Even though the borderless contact process is able to efficiently downsize a semiconductor device to increase the integration, problems, such as how to effectively control the etching process with a properly selected etching stop layer and etchant, still need to be resolved.
A currently used borderless contact process is schematically illustrated in
FIGS. 1A through 1C
.
Referring to
FIG. 1A
, a silicon nitride layer
14
is formed on a substrate
10
to cover preformed devices including an isolation structure
11
, a gate
12
and source/drain regions
13
of a metal-oxide-semiconductor (MOS) transistor. The silicon nitride layer
14
serves as an etching end point, and provides protection to the isolation structure
11
in the follow-up etching process. A silicon oxide layer
15
is then formed on the silicon nitride layer
14
.
Referring next to
FIG. 1B
, an etching process
17
is performed on the silicon oxide layer
15
to form an opening
16
that exposes a portion of the silicon nitride layer
14
, which is the etching stop layer. Normally, the etching process
17
is performed on a magnetically enhanced reactive ion etching (MERIE) etcher along with gaseous C
4
F
8
/CO/O
2
/Ar as an etching gas. Then, by removing the exposed silicon nitride layer
14
within the opening
16
, a contact hole
16
a
that exposes a portion of the source/drain regions
13
is finished, as shown in FIG.
1
C.
Because the oxide-to-nitride selectivity is the most critical parameter for the foregoing etching process, the profile of the contact hole
16
a
directly relates to the oxide-to-nitride selectivity of the selected etchant. Once an etchant with an improper oxide-to-nitride is used in the foregoing process, a problem, either over-etching the silicon nitride layer
14
as shown in
FIG. 2A
, or an abnormal termination of the etching process as shown in
FIG. 2B
, further causes electrical malfunction. While an etching process is performed on the silicon oxide layer
15
to form an opening
17
, the etching process is terminated as soon as the silicon nitride
14
is exposed. However, with an improperly selected etchant, a defective opening
17
, as shown in either
FIGS. 2A
or
2
B, is obtained. A tapered profile opening
19
as shown in
FIG. 2C
is also a possible defective opening caused by a improperly selected etchant.
As shown in
FIG. 2D
, because polymer molecules generated by the etchant normally tend to deposit on the silicon oxide near the corners of the opening
20
that further abnormally affects the isotropy of the performed etching process, a bowed profile opening
20
is obtained. Since in the fabrication process of a highly integrated semiconductor device, a vertical profile, which has lateral walls forming angles of nearly 90 degrees to the surface of the substrate, is required to meet the desired design rule, a bowed profile opening
20
is definitely unable to meet the requirement.
An etching process that uses an etchant with a low oxide-to-nitride selectivity normally leads to etch through the etch stop layer as shown in FIGS.
2
A. On the other hand, an etchant with a high oxide-to-nitride selectivity tends to cause an under-etched opening, a tapered profile and/or a bowed profile opening shown in
FIGS. 2B
,
2
C and
2
D. Therefore, conventionally, a borderless contact process can only perform on either one of the options, a vertical profile or a better control of the etching end point with high oxide to nitride selectivity, accordingly to the actual needs.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a method for forming a borderless contact hole with a vertical profile.
It is another an objective of the present invention to provide a method for forming a vertical-profile borderless contact hole by using an etchant with a high oxide-to-nitride selectivity without causing etching through etch stop layer.
It is still another objective of the present invention to provide a method for forming a borderless contact hole to overcome the punching through the etch stop layer and under-etching problems, while also providing a better control of the contact hole profile.
In accordance with the foregoing and other objectives of the present invention, the method of the invention performs an etching process to form a borderless contact hole by using an inductively coupled plasma etcher along with the selected gaseous etchant, C
4
F
8
/Ar, C
4
F
8
/CO/Ar, C
4
F
8
/C
2
F
6
/Ar, or C
4
F
8
/C
2
F
6
/CO/Ar under properly defined conditions.
On a provided substrate, a silicon nitride layer and a silicon oxide layer are formed in sequence by the method of the invention, wherein the silicon nitride layer serves as an etching stop layer. Then, the method of the invention forms a contact hole in the silicon oxide layer by performing an etching process with an etchant, C
4
F
8
/Ar, C
4
F
8
/CO/Ar, C
4
F
8
/C
2
F
6
/Ar, or C
4
F
8
/C
2
F
6
/CO/Ar on an inductively coupled plasma etcher. The inductively coupled plasma etcher contains a chamber, a ring, and a roof. The etchant used in the etching process is controlled under conditions including a C
4
F
8
flow of about 10 to 20 sccm, and an Ar flow of about 50 to 500 sccm. The flow of C
2
F
6
is about 0.5 to 1.5 times of that of C
4
F
8
, if the selected etchant is C
4
F
8
/C
2
F
6
/Ar. The flow of CO is less than about 100 sccm. In the mean time, the conditions of the inductively coupled plasma etcher include a roof temperature of about 100 to 300° C., a ring temperature of about 150 to 400° C., and a pressure within the chamber of about 4 to 100 mtorr. By controlling the chamber pressure and the deposition rate of the polymer molecules, a properly profiled contact hole is obtained.
REFERENCES:
patent: 5595627 (1997-01-01), Inazawa et al.
patent: 5767017 (1998-06-01), Armacost et al.
patent: 5811357 (1998-09-01), Armacost et al.
patent: 5904780 (1999-05-01), Tomoyasu
Chen Tong-Yu
Lin Tsu-An
Yang Chan-Lon
Hickman Coleman & Hughes LLP
Kunemund Robert
Tran Binh X
United Microelectronics Corp.
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