Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Reexamination Certificate
2000-11-17
2002-12-31
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
C438S435000, C438S424000, C438S592000
Reexamination Certificate
active
06500730
ABSTRACT:
TECHNICAL FIELD
This invention concerns semiconductor processing methods for filling structural gaps and integrated circuitry having filled structural gaps.
BACKGROUND OF THE INVENTION
In semiconductor wafer processing, device structures are formed on a semiconductor substrate.
FIG. 6
illustrates a wafer fragment
600
comprising a bulk substrate
45
having a pair of wordline constructions
60
formed thereon. A gate oxide
15
, gate conductor
20
, cap
25
, and spacers
30
comprise the individual structural components of wordline constructions
60
. Often, it is desirable to form a layer of insulation material over the device structures formed on a semiconductor wafer, such as substrate
45
. An insulation layer
640
on wafer portion
600
may be formed by depositing borophosphosilicate glass (BPSG) and reflowing the deposited insulation material to densify and planarize insulation layer
640
.
Before forming insulation layer
640
, a gap exists in areas where substrate
45
is not covered by device structures, like wordline constructions
60
. Such a gap may expose substrate
45
to boron and/or phosphorous diffusion from the BPSG in insulation layer
640
. A barrier layer
635
is often formed over device structures prior to formation of insulation layer
640
to counteract such boron and/or phosphorous diffusion. Unfortunately, barrier layer
635
forms a reduced gap within the original gap that has a higher aspect ratio than the original gap. When the aspect ratio of a gap between device structures is sufficiently high, it may cause formation of voids, such as a void
650
, in insulation layer
640
during deposition. It is highly desirable to form insulation layer
640
such that it fills the reduced gap between wordline constructions
60
without formation of void
650
.
Accordingly, barrier layer
635
addresses the problem of boron and/or phosphorous diffusion, but exacerbates the problem of void formation. Thus, a need exists to provide a method for protecting against boron and/or phosphorous diffusion while reducing the likelihood of forming voids in structural gaps. Otherwise, semiconductive substrates may either suffer defects resulting from boron and/or phosphorous diffusion or defects resulting from formation of voids.
While motivated from this perspective, the artisan will appreciate other applicabilities, with the invention only being limited by the accompanying claims appropriately interpreted in accordance with The Doctrine of Equivalents.
SUMMARY OF THE INVENTION
According to one aspect of the invention, a semiconductor processing method for filling structural gaps includes depositing a substantially boron free silicon oxide comprising material at a first average deposition rate over an exposed semiconductive material in a gap between wordline constructions and at a second average deposition rate less than the first average deposition rate over the wordline constructions. A reduced gap having a second aspect ratio less than or equal to a first aspect ratio of the original gap may be provided. A layer of a boron containing silicon oxide material may be deposited on the substantially boron free silicon oxide material and over the wordline constructions. The boron containing silicon oxide material may be deposited in situ in the same chamber.
According to another aspect of the invention, an integrated circuit includes a pair of wordline constructions separated by a gap therebetween in areas where the wordline constructions do not cover an underlying semiconductive substrate. A layer of substantially boron free silicon oxide material has a first thickness over the substrate within the gap and has a second thickness less than the first thickness over the wordline constructions. A layer of boron containing silicon oxide material is over the substantially boron free silicon oxide comprising material.
Other aspects are, of course, contemplated.
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Elbel; Gabric; Langheinrich; and Neureither, “A New STI Process Based on Selective Oxide Deposition,” Seimens AG, Semiconductor Group, Section 1739 Munich, Germany; SIMEC, 01099 Dresden, Germany.
Everhart Caridad
Micro)n Technology, Inc.
Wells St. John P.S.
Yevsikov V.
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