Method for facilitating read completion in a computer system...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process

Reexamination Certificate

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Details

C710S306000, C710S309000, C710S311000

Reexamination Certificate

active

10885436

ABSTRACT:
A method for facilitating read completion in a computer system supporting write posting operations. A posted memory write and its associated tag both need to be buffered, where the associated tag is designated to a master of a local bus originating the posted memory write. When a read request moving in an opposite direction of the posted memory write is detected, the read request is checked to identify which master of the local bus is addressed. A destination tag is then assigned to the read request contingent upon the currently addressed master. Further, the destination tag of the read request is compared with the associated tag of the posted memory write. If the destination tag of the read request differs from the associated tag of the posted memory write, the read request can be completed directly regardless of the outstanding posted writes.

REFERENCES:
patent: 5938739 (1999-08-01), Collins et al.
patent: 6405276 (2002-06-01), Chen et al.
patent: 6721813 (2004-04-01), Owen et al.
patent: 2002/0184453 (2002-12-01), Hughes et al.

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