Method for fabricating vertical offset structure

Details Method for fabricating vertical offset structure Method for fabricating vertical offset structure

2007-05-08

2007-05-08

Tsai, H. Jey (Department: 2812)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

C438S050000, C438S700000, C257SE21546

Reexamination Certificate

active

11134521

ABSTRACT:
A method for fabricating a vertical offset structure that forms a complete vertical offset on a wafer includes a first trench forming step of forming first trenches on a wafer; a first etching step of performing a first patterning for determining etching positions of second and third trenches by depositing a first thin film on the wafer, performing a second patterning for temporarily protecting the etching position of the third trench by depositing a second thin film on the first thin film and the wafer, and then forming the second trenches by etching the wafer; a second etching step of forming a protection layer on side surfaces of the second trenches and then vertically extending the second trenches by etching the wafer; a third etching step of removing the second thin film and then forming the third trench by etching a position from which the second thin film is removed; and a fourth etching step of horizontally extending the second trenches vertically extended at the second etching step and the third trench by etching the wafer.

REFERENCES:
patent: 6849912 (2005-02-01), Bertz et al.
patent: 2004106116 (2004-04-01), None
patent: 2002-0085211 (2002-11-01), None

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