Method for fabricating transistors using crystalline silicon dev

Details Method for fabricating transistors using crystalline silicon dev Method for fabricating transistors using crystalline silicon dev

1995-01-17

1997-09-02

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438158, 438164, 438404, 438970, 438311, H01L 21786

Patent

active

056630786

ABSTRACT:
A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

REFERENCES:
patent: 5013681 (1991-05-01), Godbey et al.
patent: 5110748 (1992-05-01), Sarma
patent: 5436173 (1995-07-01), Houston
patent: 5455202 (1995-10-01), Malloy et al.

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