Method for fabricating thin film transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

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438486, 438487, 117 8, H01L 2100, H01L 2712, H01L 2184

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active

061626678

ABSTRACT:
In a fabrication of a semiconductor device, an amorphous semiconductor film is first formed on a substrate having an insulating surface. Then, a minute amount of catalyst elements for accelerating crystallization of the amorphous semiconductor film is supplied to at least a portion of a surface of the amorphous semiconductor film. A heat treatment is further conducted so that the supplied catalyst elements are diffused into the amorphous semiconductor film. Thus, the catalyst elements are introduced uniformly into the amorphous semiconductor film in a very minute amount or at a low concentration, resulting in polycrystallization of at least a portion of the amorphous semiconductor film. Utilizing the thus obtained crystalline semiconductor film on the substrate surface as an active region, a semiconductor device such as a TFT is fabricated. The introduction of the catalyst elements are conducted by various methods such as: a formation of a film containing a minute amount of the catalyst elements; application of a solution containing the catalyst elements in several spin coating cycles; diffusion of the catalyst elements through a buffer layer; dipping into a solution in which the catalyst elements are dissolved or dispersed; or formation of a plating layer containing the catalyst elements.

REFERENCES:
patent: 5147826 (1992-09-01), Liu et al.
patent: 5275851 (1994-01-01), Fonash et al.
patent: 5481121 (1996-01-01), Zhang et al.
patent: 5492843 (1996-02-01), Adachi et al.
patent: 5501989 (1996-03-01), Takayama et al.
patent: 5529937 (1996-06-01), Zhang et al.
patent: 5534716 (1996-07-01), Takemura
patent: 5543352 (1996-08-01), Ohtani et al.
patent: 5550070 (1996-08-01), Funai et al.
patent: 5580792 (1996-12-01), Zhang et al.
patent: 5585291 (1996-12-01), Ohtani et al.
patent: 5612250 (1997-03-01), Ohtani et al.
patent: 5643826 (1997-07-01), Ohtani et al.
patent: 5654203 (1997-08-01), Ohtani et al.
Choi et al, "The Effects of Grain Boundary on Excimer-Laser-Crystallized Poly-Si TFT Characteristics", Extended Abstract of Applied Physics Society, vol. 2, 1993.

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