Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2004-06-28
2008-07-08
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C257S706000
Reexamination Certificate
active
07396700
ABSTRACT:
A method for fabricating a thermally enhanced semiconductor device. A support plate having at least one opening is mounted on a heat sink. At least one chip is mounted on the heat sink and received in the opening. An insulating layer is formed over the chip and the support plate and filled in the opening. A plurality of vias are formed in the insulating layer to expose electrode pads on the chip. A conductive layer is deposited on the insulating layer and the exposed electrode pads. A resist layer is formed on the conductive layer and patterned to expose a predetermine part on the conductive layer. Then, a patterned circuit layer is deposited on the exposed part of the conductive layer by electroplating. The patterned resist layer and the conductive layer underneath the patterned resist layer are removed. A plurality of conductive elements are formed on the circuit layer.
REFERENCES:
patent: 6351031 (2002-02-01), Iijima et al.
Clark & Brody
Nixon William F.
Phoenix Precision Technology Corporation
Vu David
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