Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Reexamination Certificate
2006-05-16
2006-05-16
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
C438S400000, C438S405000
Reexamination Certificate
active
07045437
ABSTRACT:
A method of forming shallow trenches used, for example, in shallow trench isolation includes the steps of providing a p-type silicon substrate, forming a layer in the p-type silicon substrate, wherein the layer includes p-type silicon interposed between n-type silicon. The p-type silicon layer interposed between the n-type silicon is then subject to an anodization process to form porous silicon. The porous silicon regions are then oxidized. The porosity of the silicon layer may be controlled to create an isolation region that is either substantially flush with, above, or below an upper surface of the n-type top layer. For example, by adjusting the anodization time, a retrograde cross-sectional profile of the shallow trench can be obtained that leads to improved isolation between adjacent devices.
REFERENCES:
patent: 4748489 (1988-05-01), Komatsu
patent: 2005/0106835 (2005-05-01), Layadi et al.
Coleman W. David
Davidson Michael S.
Stark Jarrett
Vista IP Law Group LLP
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