Method for fabricating semiconductor memory device

Details Method for fabricating semiconductor memory device Method for fabricating semiconductor memory device

1992-06-30

1994-09-13

Thomas, Tom

Fishing, trapping, and vermin destroying

437 49, 437228, 437195, H01L 2170

Patent

active

053468449

ABSTRACT:
A semiconductor memory device and fabricating method thereof including one transistor consisting of a source, a drain and a gate electrode, a bit line in contact with the drain region of the transistor via a first contact hole, a storage electrode in contact with the source region of the transistor via a second contact hole, a first planarized insulating layer formed under the bit line and a second planarized insulating layer formed under the storage electrode, whereby the material layer formed under the conductive layers, e.g., the bit line and storage electrode, is planarized to prevent stringers created due to surface indentations. Further, after a spacer is formed directly on the side walls of contact hole or on the side walls of a pattern for forming the contact hole, the contact hole is formed to prevent the contact between conductive layers, as a result, improving the memory device's reliability and being advantageous in realizing high density.

REFERENCES:
patent: 4565712 (1986-01-01), Noguchi et al.
patent: 5079181 (1992-01-01), Shimizu et al.

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