Method for fabricating semiconductor devices having bit lines an

Details Method for fabricating semiconductor devices having bit lines an Method for fabricating semiconductor devices having bit lines an

1995-12-29

1997-05-06

Tsai, Jey

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438702, 438396, H01L 2170, H01L 2700

Patent

active

056270950

ABSTRACT:
A method of manufacturing a semiconductor device, capable of securing an alignment margin between bit lines and a storage node contact is disclosed herein. The method includes: a depositing step of a first insulating layer on a semiconductor substrate of MOS structure; a forming step of a bit line pattern; a depositing step of a second insulating layer; a depositing step of sequentially a third and fourth insulating layers which have different etch rates; a masking and etching step of said fourth and third insulating layers to form T-shaped patterns in cross-sectional view; a forming step of polysilicon spacers at sidewalls of the T-shaped insulating patterns; a depositing step of a fifth insulating layer; a forming step of first photoresist mask pattern; etching steps of etching a predetermined portion of the fifth insulating layer, etching the T-shaped insulating layer pattern, etching the second insulating layer, etching the bit line pattern and etching the first insulating layer; a forming step of bit line contact; a depositing step of a sixth insulating layer; a forming step of second photoresist mask pattern for forming storage node contact hole on the sixth insulating layer and a forming step of a storage node contact hole by etching the predetermined portions of the sixth and fifth insulating layers, the T-shaped pattern, and the second and first insulating layer, sequentially.

REFERENCES:
patent: 5424235 (1995-06-01), Nishihara
patent: 5470776 (1995-11-01), Ryou
patent: 5492851 (1996-02-01), Ryou

Affiliated with

Also associated with

Rating

Method for fabricating semiconductor devices having bit lines an does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating semiconductor devices having bit lines an, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating semiconductor devices having bit lines an will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2132181