Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2005-06-10
2008-10-28
Hendricks, Keith D. (Department: 1794)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C216S057000
Reexamination Certificate
active
07442648
ABSTRACT:
The present invention relates to a method for fabricating a semiconductor device using tungsten as a sacrificial hard mask material. The method includes the steps of: forming a layer on an etch target layer; forming a photoresist pattern on the layer; etching the layer by using the photoresist pattern as an etch mask along with use of a plasma containing CHF3gas to form a sacrificial hard mask; and etching the etch target layer by using at least the sacrificial hard mask as an etch mask, thereby obtaining a predetermined pattern.
REFERENCES:
patent: 4836887 (1989-06-01), Daubenspeck et al.
patent: 5851926 (1998-12-01), Kumar et al.
patent: 6037265 (2000-03-01), Mui et al.
patent: 6087269 (2000-07-01), Williams
patent: 6143654 (2000-11-01), Hahm et al.
patent: 6261967 (2001-07-01), Athavale et al.
patent: 6518206 (2003-02-01), Kumar et al.
patent: 6764893 (2004-07-01), Lee et al.
patent: 7026253 (2006-04-01), Lee
patent: 2006/0124587 (2006-06-01), Lee
patent: 1469428 (2004-01-01), None
patent: 1512272 (2004-07-01), None
patent: 1522465 (2004-08-01), None
patent: 03-201529 (1991-03-01), None
patent: 10-0198600 (1999-02-01), None
patent: 10-2003-0040030 (2003-05-01), None
patent: 2004-0057434 (2004-02-01), None
patent: 2004-0057502 (2004-02-01), None
patent: 2004-0059925 (2004-06-01), None
patent: WO 02/097852 (2002-12-01), None
Wolf et al. (Silicon Processing for the VLSI Era; vol. 1, 1989, Lattice Press).
Kim et al., “ID Bias Control During W/WN/POLY Gate Etching for Nano-Scale DRAM Process Integration”, Dry Process International Symposium, 7 sheets, (2004).
Decision of the Intellectual Property Office from the Taiwanese Intellectual Property Office, issued Feb. 6, 2007, in Taiwanese Application No. 094115738.
Notice of Programming Rejection from the Korean Intellectual Property Office, mailed Jun. 28, 2007 in Korean Patent Application No. 2004-0081383 and English translation thereof.
Cho Yun-Seok
Jung Jin-Ki
Kim Jin-Woong
Kim Kwang-Ok
Lee Dong-Duk
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
George Patricia A
Hendricks Keith D.
Hynix / Semiconductor Inc.
LandOfFree
Method for fabricating semiconductor device using tungsten... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating semiconductor device using tungsten..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating semiconductor device using tungsten... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4014766