Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-11-10
2001-06-12
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S386000, C438S399000
Reexamination Certificate
active
06246084
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device and a method for fabricating the same, which simplifies the process steps and improves characteristic of the device in simultaneously forming a CMOS device and an analog device (capacitor and resistor) on a semiconductor substrate.
2. Discussion of the Related Art
Generally, a CMOS analog device is formed in such a manner that NMOS and PMOS transistors are formed in an active region on a semiconductor substrate and a capacitor and a resistor are formed on a field oxide film.
A background art method for fabricating a semiconductor device will be described with reference to the accompanying drawings.
FIGS. 1
a
to
1
e
are sectional views illustrating a background art method for fabricating a semiconductor device.
As shown in
FIG. 1
a,
a field oxide film
12
is formed in a field region of a semiconductor substrate
11
in which the field region and an active region are defined. Ions for adjustment of a threshold voltage are implanted into the active region of the semiconductor substrate
11
. A gate insulating film
13
is then formed on the semiconductor substrate
11
.
As shown in
FIG. 1
b,
a first doped polysilicon is deposited on the gate insulating film
13
including the field oxide film
12
. The first polysilicon is then patterned to form a gate electrode
14
of a MOS transistor, a capacitor lower electrode
15
, and a resistor
16
. At this time, the gate electrode
14
is formed in the active region of the semiconductor substrate
11
and the capacitor lower electrode
15
and the resistor
16
are formed on the field oxide film
12
. The resistor
16
may be formed of a second polysilicon for a capacitor upper electrode, which will be formed later, instead of the first polysilicon.
As shown in
FIG. 1
c,
impurity ions are implanted into the surface of the semiconductor substrate
11
at both sides of the gate electrode
14
using the gate electrode
14
as a mask to form source and drain impurity ion diffusion regions
17
and
17
a.
Thereafter, a capacitor dielectric film
18
and a capacitor upper electrode
19
are sequentially formed on the capacitor lower electrode
15
. At this time, the capacitor upper electrode
19
is patterned with a width smaller than the capacitor lower electrode
15
. An oxide film, a nitride film, and a stacked film of the oxide film and the nitride film may be used as the capacitor dielectric film
18
.
Subsequently, as shown in
FIG. 1
d,
a sidewall
20
is formed at both sides of the gate electrode
14
, the resistor
16
, the capacitor lower electrode
15
and the capacitor upper electrode
19
. An insulating film
21
for prevention of silicide is formed in a predetermined region on the resistor
16
so as not to form a silicide which will be formed later.
A refractory metal for the formation of silicide, such as tungsten, titanium, and the like, is formed on the entire surface of the semiconductor substrate
11
and then annealed. As a result, a silicide film
22
is formed on gate electrode
14
, the semiconductor substrate
11
at both sides of the gate electrode
14
, the capacitor upper electrode
19
, some portion of the capacitor lower electrode
15
which is not masked by the capacitor upper electrode
19
, and the resistor
16
on which the insulating film
21
is not formed.
As shown in
FIG. 1
e,
an insulating film
23
is formed on the entire surface of the semiconductor substrate
11
including the silicide film
22
. The insulating film
23
is then selectively removed to expose the surface of the silicide film
22
. A contact hole is formed on the exposed surface of the silicide film
22
. The contact hole is then plugged to form a plug
24
which is connected with the silicide film
22
.
A metal is deposited on the entire surface including the plug
24
and then patterned to form a metal line
25
. As a result, the process steps of fabricating the background art semiconductor device are completed.
However, the background art method for fabricating the semiconductor device has several problems.
Since the capacitor upper and lower electrodes are formed of doped polysilicon, voltage coefficient characteristic is poor, which shows variation width of the capacitance value in unit by the voltages of the upper and lower electrodes. This deteriorates characteristic of the analog device. To improve such characteristics, it is necessary to control the density of the impurity ions as thick as possible. However, it is difficult to improve such characteristics because there is limitation in making the impurity ions thick.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a semiconductor device and a method for fabricating the same that substantially obviate one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a semiconductor device and a method for fabricating the same, in which a capacitor lower electrode is formed of doped polysilicon and a capacitor upper electrode is formed of metal material to improve voltage coefficient characteristic.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a semiconductor device according to the present invention includes a semiconductor substrate in which an active region and a field region are defined, a gate electrode and source and drain regions formed in the active region of the semiconductor substrate, a field oxide film formed in the field region of the semiconductor substrate, a capacitor lower electrode and a resistor formed of a doped polysilicon on the field oxide film, a capacitor dielectric film formed in a predetermined region on the capacitor lower electrode, and a capacitor upper electrode formed of metal material on the capacitor dielectric film.
In another aspect, a method for fabricating the semiconductor device includes the steps of forming a gate electrode and source and drain regions in an active region of a semiconductor substrate in which a field oxide film is formed, forming a capacitor lower electrode and a resistor on the field oxide film, forming an insulating film for prevention of silicide in a predetermined region on the resistor and the capacitor lower electrode, forming a silicide film on the gate electrode, the source and drain regions, and the resistor and the capacitor lower electrode on which the insulating film for prevention of silicide is not formed, and forming a capacitor upper electrode of metal material on the insulating film formed on the capacitor lower electrode.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5434098 (1995-07-01), Chang
patent: 5618749 (1997-04-01), Takahashi et al.
patent: 5656524 (1997-08-01), Eklund et al.
patent: 5714410 (1998-02-01), Kim
patent: 5736721 (1998-04-01), Shimomura et al.
patent: 5780333 (1998-07-01), Kim
patent: 6004841 (1999-12-01), Chang et al.
patent: 5-21808 (1993-01-01), None
patent: 5-283634 (1993-10-01), None
Chaudhuri Olik
Fleshner & Kim LLP
Ha Nathan W.
Hyundai Electronics Industries Co,. Ltd.
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