Abrading – Abrading process – With tool treating or forming
Reexamination Certificate
1999-08-10
2003-09-02
Rachuba, M. (Department: 3723)
Abrading
Abrading process
With tool treating or forming
C451S285000, C451S287000, C451S443000, C451S444000
Reexamination Certificate
active
06612912
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for fabrication of a semiconductor device which comprise a polishing process for planarizing the surface pattern in fabrication of an integrated semiconductor circuit and an apparatus suitable for processing the semiconductor device.
A fabrication process for fabricating a semiconductor device comprises many processing steps. A metallization process is described with reference to FIG.
2
(
a
) to FIG.
2
(
f
) as an example of a process comprising a polishing step.
FIG.
2
(
a
) shows a cross section of a wafer on which the first wiring layer has been formed. A dielectric film
2
is formed on the surface of a wafer substrate
1
having a transistor unit (not shown in the drawing), and a wiring layer
3
of aluminum is formed thereon. Because a hole is provided on the dielectric film
2
for serving to connect to the transistor, the surface of a portion
3
′ is somewhat concave above the hole. In the step for forming the second wiring layer shown in FIG.
2
(
b
), a dielectric film
4
and aluminum layer
5
are formed on the first layer, and further a photo resist layer
6
is formed to pattern the aluminum layer
5
in the form of wiring. Next as shown in FIG.
2
(
c
), the circuit pattern is transferred by exposing on the photo resist
6
by use of a stepper
7
. At that time, the focus can not be adjusted both on the convex surface and the concave surface of the photo resist layer
6
, and a serious defocus problem is caused.
To solve the problem, planarization processing of the substrate surface is carried as described herein under. Subsequently to the processing step shown in FIG.
2
(
a
), a dielectric film is formed as shown in FIG.
2
(
d
) and then the dielectric film is polished to the predetermined level
9
in the drawing to planarize the surface by a method described hereinafter, and the surface of the dielectric film
4
is planarized as shown in FIG.
2
(
e
). Thereafter, an aluminum layer
5
and photo resist layer
6
are formed and exposed by use of a stepper
7
as shown in FIG.
2
(
f
). In this case, the defocus problem is not caused because the surface of the photo resist layer
6
is planer.
CMP (Chemical Mechanical Polishing) process which has been used generally to planarize a dielectric pattern is shown in
FIG. 3. A
polishing pad
11
which is adhered on a platen
12
is being rotated. For example, a foamed polyurethane resin sheet which is formed by slicing a foamed polyurethane resin block is used as the polishing pad. However, generally the material of the polishing pad is selected in view of property and surface structure of materials depending on type of the object to be processed and desired surface finish roughness. On the other hand, a wafer substrate
1
to be processed is fixed on a wafer holder
14
with interposition of an elastic backing pad
13
. A wafer substrate
1
is pressed on the surface of the polishing pad
11
while the wafer holder
14
is being rotated, polishing slurry
15
is supplied on the polishing pad
11
to remove and planarize the convex portion of the dielectric film
4
on the wafer surface.
For polishing a dielectric film of such as silicon dioxide, generally fumed silica is used as the polishing slurry. The fumed silica is a suspension formed by suspending fine silica particulate having a diameter of about 30 nm in an alkaline solution containing alkali such as ammonia or potassium hydroxide. A plane surface is obtained without damage by use of fumed silica.
In CMP processing using abrasive grain suspension, an object is polished while polishing slurry is fed between a polishing pad and the object, the following problem arises due to use of the polishing pad and polishing slurry.
First, the capability of planarization is not sufficient because the Young's modulus of the polishing pad is not high. Because the polishing pad is in contact not only with convex portion but also with concave portion of the wafer surface because of the pressure during polishing. That is particularly true for larger pattern. The planarizable maximum pattern size is several mm width for a method in which the polishing pad is used, and it is difficult to sufficiently planarize a pattern having a size as large as several cm which is required for, for example, DRAM. Next, the special caution is needed when dealing with the polishing slurry, the special caution results in high cost. Dried polishing slurry can not be removed easily, and residual polishing slurry is the source of dust which adversely affects the cleanliness in a clean room. Abrasive grains in the polishing slurry aggregate each other with time to form aggregated particles. The aggregated particles cause damage such as scratch. The polishing slurry generally contains alkali, and the apparatus should be adapted to alkali. As the result, a polishing slurry supplying equipment to be used exclusively is required and the polishing slurry is expensive itself. Therefore, the processing cost for a CMP processing method in which abrasive grain suspension is used is high. Further, there arises a problem that the shape of the surface of a polishing pad is deformed with using and the removal rate (efficiency of polishing) decreases. To resume the removal rate, a polishing pad is reclaimed every time when one wafer substrate is processed or when processing simultaneously, which reclamation is generally called as dressing. A file referred to as dresser which is formed by electrically depositing diamond abrasive grains is used to roughen the surface of the polishing pad, and the removal rate is resumed.
As the wafer substrate planarization processing technique for solving the problem associated with CMP processing by use of abrasive grain suspension, a part of the inventors of the present invention proposed the planarization technique with grindstone in which fixed abrasive was used (International application open laid; WO 97/10613).
FIG. 4
is a schematic diagram for describing the planarization processing using grindstone. The basic structure of the apparatus is the same as that used in CMP polishing technique in which a polishing pad and abrasive grain suspension are used, but this apparatus is different from the conventional CMP polishing technique in that a grindstone
16
containing abrasive grains of cerium oxide instead of a polishing pad. It is possible to polish by merely supplying deionized water which contains no abrasive grain instead of fumed silica slurry as a polishing supply. This method in which a grindstone is used as polishing tool is excellent in capability of planarizing pattern topography, and it is possible to sufficiently planarize a pattern having several mm width, which is difficult to be planarized by the conventional method. The process cost is reduced by employing this method because a grindstone which is excellent in utilization of abrasive grain, is used instead of polishing slurry which is inferior in utilization.
Japanese Unexamined Patent Publication No. Hei 7-249601 discloses a polishing technique in which a grindstone for polishing bare wafers is cleaned by jetting high pressure fluid or by use of a brush, however this conventional technique addresses neither on the method for polishing a wafer on which a device is formed nor the method for planarization of a wafer on which a device is formed.
On the other hand, U.S. Pat. No. 5,624,303 discloses a method in which a polishing pad containing abrasive grains to which treatment for preventing breaking down of abrasive grain is applied, and U.S. Pat. No. 5,782,675 discloses a method for conditioning to prevent breaking down of abrasive grains of a polishing pad containing abrasive grains.
The techniques in which a grindstone is used for polishing is excellent in low cost and planarization capability, however involved in the problem as described herein under.
First, the removal rate of the method in which only deionized water is used as the process fluid is as low as about ⅓ of the removal rate of a method in which abrasive
Katagiri Souichi
Kawai Ryousei
Kawamura Yoshio
Moriyama Shigeo
Nishimura Sadayuki
Hitachi , Ltd.
Mattingly Stanger & Malur, P.C.
Rachuba M.
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