Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-09-25
2009-10-27
Dickey, Thomas L (Department: 2893)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S669000, C257SE21245
Reexamination Certificate
active
07608537
ABSTRACT:
A method for fabricating a semiconductor device, includes forming an opening in a first film, embedding an alignment mark material for alignment with an upper layer in the opening, forming a second film on the first film in which the alignment mark material is embedded, irradiating the second film formed in a predetermined region including a position where the alignment mark material is embedded with a processing light, thereby to remove the second film to an extent that a portion of the second film remains in the predetermined region, and exposing the portion of the second film remaining in the predetermined region to an etching environment for etching the second film.
REFERENCES:
patent: 5597590 (1997-01-01), Tanimoto et al.
patent: 6377232 (2002-04-01), Chevet et al.
patent: 6462428 (2002-10-01), Iwamatsu
patent: 6528386 (2003-03-01), Summerfelt et al.
patent: 2002/0139786 (2002-10-01), Amako et al.
patent: 2004/0043310 (2004-03-01), Takeishi et al.
patent: 2005/0064344 (2005-03-01), Bailey et al.
patent: 2005/0069815 (2005-03-01), Takeishi et al.
patent: 2005/0070068 (2005-03-01), Kobayashi
patent: 2005/0106775 (2005-05-01), Hasei
patent: 2007/0090549 (2007-04-01), Kudo et al.
patent: 10-226537 (1998-08-01), None
patent: 2001-15407 (2001-01-01), None
patent: 2003-332215 (2003-11-01), None
patent: 2005-59064 (2005-03-01), None
H. Shinomiya, et al., “Method for Manufacturing a Semiconductor Device”, U.S. Appl. No. 11/790,723, filed Apr. 27, 2007.
Kaneko Hisashi
Matsuo Mie
Dickey Thomas L
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Yushin Nikolay
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