Method for fabricating semiconductor device

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Self-aligned

Reexamination Certificate

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C438S231000, C438S232000, C438S372000, C438S508000

Reexamination Certificate

active

07314805

ABSTRACT:
An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p
junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p
junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide12, so that the source/drain region (S and D) can have a low resistance, and a p
junction leakage can be reduced.

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