Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-08-31
2004-12-28
Wilczewski, Mary (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S623000, C438S624000, C438S627000, C438S631000, C438S637000, C438S668000, C438S692000
Reexamination Certificate
active
06835645
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for fabricating a semiconductor device, and more particularly, it relates to a method for forming a low dielectric film locally in a region of an insulating film where capacitance between interconnects is desired to be lowered.
Recently, in accordance with the increased degree of integration and the increased performance and operation speed of semiconductor integrated circuit devices, metal interconnects have been further refined and formed in structures of a larger number of levels. As one of means for attaining the refinement and the multi-level structures, a technique to use, as an interlayer insulating film, an insulating film with a low dielectric constant (hereinafter referred to as a low dielectric insulating film) has been proposed.
When a low dielectric insulating film is used for forming an interlayer insulating film, capacitance between interconnects can be lowered so as to avoid a problem of signal delay.
However, most of currently examined low dielectric insulating films have disadvantages of weakness against impact due to low mechanical strength and a poor heat conducting property due to low thermal conductivity.
In a technique proposed for overcoming these disadvantages, a low dielectric insulating film is used in a region of an interlayer insulating film where signal delay can lead to a serious problem, and an insulating film having a high dielectric constant but having high mechanical strength and high thermal conductivity, such as a silicon oxide film, is used in a region of the interlayer insulating film where signal delay does not lead to a serious problem.
Now, a method for locally forming a low dielectric insulating film between interconnects disclosed in Japanese Laid-Open Patent Publication No. 11-135620 will be described with reference to
FIGS. 8A through 8D
.
First, as shown in
FIG. 8A
, after forming metal interconnects
11
on a semiconductor substrate
10
, a resist pattern
12
is formed on a region of the semiconductor substrate
10
where capacitance between interconnects is particularly desired to be lowered.
Next, as shown in
FIG. 8B
, a silicon oxide film
13
is formed by liquid phase growth on a region of the semiconductor substrate
10
where the resist pattern
12
is not formed.
Then, as shown in
FIG. 8C
, after removing the resist pattern
12
, a low dielectric insulating film
14
is formed on the entire face of the semiconductor substrate
10
.
Subsequently, as shown in
FIG. 8D
, a portion of the low dielectric insulating film
14
present on the silicon oxide film
13
is removed by CMP, thereby placing the top faces of the silicon oxide film
13
and the low dielectric insulating film
14
at substantially the same level.
By repeatedly carrying out the aforementioned procedures, the low dielectric insulating film
14
can be selectively formed in regions where capacitance between interconnects is particularly desired to be lowered.
When the interconnect pitch is reduced as a result of reduction of semiconductor integrated circuit devices, however, it becomes difficult to fill the low dielectric insulating film between interconnects, which disadvantageously restricts the material for the low dielectric insulating film.
Also, since the low dielectric insulating film is generally poor in the mechanical strength, there arises a problem that defects such as peeling and scratch may be caused in the low dielectric insulating film in planarizing it by the CMP.
SUMMARY OF THE INVENTION
In consideration of the aforementioned conventional problems, an object of the invention is definitely forming a low dielectric insulating film between interconnects with a small interconnect pitch and preventing peeling or scratch of the low dielectric insulating film.
In order to achieve the object, the method for fabricating a semiconductor device of this invention comprises the steps of forming, on a substrate, a first insulating film with a relatively low dielectric constant and low mechanical strength; patterning the first insulating film through selective etching using a first mask pattern formed on a first region of the first insulating film; forming, on the substrate, a second insulating film with a relatively high dielectric constant and high mechanical strength; forming a thinned portion of the second insulating film on the patterned first insulating film by planarizing the second insulating film by polishing; forming a first interconnect groove in the thinned portion of the second insulating film and the patterned first insulating film through selective etching using a second mask pattern formed on the planarized second insulating film; and forming a buried interconnect in the first interconnect groove.
In the method for fabricating a semiconductor device of this invention, after forming the patterned first insulating film in the first region by patterning the first insulating film with a low dielectric constant and low mechanical strength, the second insulating film with a high dielectric constant and high mechanical strength is formed. Therefore, the first insulating film with a low dielectric constant can be present in the first region alone. Also, since the first insulating film with low mechanical strength is not exposed in planarizing the second insulating film with high mechanical strength by polishing, defects such as peeling and scratch can be prevented from being caused in the first insulating film. Furthermore, since the buried interconnect is formed by filling the metal film in the first interconnect groove formed in the first insulating film with a low dielectric constant, the first insulating film can be definitely disposed between interconnects even when the interconnect pitch is small.
The method for fabricating a semiconductor device preferably further comprises a step of forming, on the buried interconnect, a third insulating film for preventing diffusion of a metal included in the buried interconnect.
Thus, the metal included in the buried interconnect can be prevented from diffusing into the insulating film formed thereon.
In the method for fabricating a semiconductor device, both of the first insulating film and the second insulating film preferably include inorganic materials as principal constituents, and the step of forming the first interconnect groove preferably includes a sub-step of forming a second interconnect groove in a second region of the planarized second insulating film through selective etching using the second mask pattern.
Thus, the first interconnect groove and the second interconnect groove can be respectively formed in the first insulating film and the second insulating film through one selective etching.
Alternatively, in the method for fabricating a semiconductor device, it is preferred that the first insulating film includes an organic material as a principal constituent and that the second insulating film includes an inorganic material as a principal constituent, and the step of forming the first interconnect groove preferably includes a sub-step of forming a second interconnect groove in a second region of the planarized second insulating film through selective etching using the second mask pattern in forming an upper portion of the first interconnect groove in the thinned portion of the second insulating film through the selective etching using the second mask pattern.
Thus, a material with a low dielectric constant can be used for forming the first insulating film. Also, even when the first insulating film and the second insulating film are made from different materials, the first interconnect groove and the second interconnect groove can be respectively formed in the first insulating film and the second insulating film.
In this case, the step of forming the first interconnect groove preferably includes a sub-step of removing the second mask pattern in forming a lower portion of the first interconnect groove in the first insulating film through the selective etching using the second mask pattern.
Thus, the removal of the seco
Matsushita Electric - Industrial Co., Ltd.
Nixon & Peabody LLP
Studebaker Donald R.
Thomas Toniae M.
Wilczewski Mary
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