Method for fabricating saddle type fin transistor

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C257SE21232

Reexamination Certificate

active

07846844

ABSTRACT:
A method for fabricating a saddle type fin transistor includes: preparing a substrate where a device isolation structure is already formed; forming a hard mask pattern over the substrate, the hard mask pattern including a coating layer obtained through a coating method; and performing an etching process using the hard mask pattern as an etch mask to form a saddle type fin. The hard mask pattern may be formed in a stack structure including an amorphous carbon layer and the coating layer.

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patent: 10-2006-0065946 (2006-06-01), None

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