Method for fabricating MOSFET having increased effective gate le

Details Method for fabricating MOSFET having increased effective gate le Method for fabricating MOSFET having increased effective gate le

1999-08-10

2000-10-03

Monin, Jr., Donald L.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257331, 257302, H01L 2976

Patent

active

061276995

ABSTRACT:
A process for fabricating a semiconductor device comprising a source, a drain, and a gate electrode having an increased effective gate length. A semiconductor device is fabricated by a process comprising the following steps: forming active areas separated by field oxide regions; forming a lightly doped region in each active area; forming a heavily doped p-Si (or a-Si) layer; depositing and patterning several dielectric layers to form a gate area surrounded by vertical spacers; forming a groove in the gate area and the substrate; forming a gate oxide layer in the groove and driving dopants in the doped p-Si (or a-Si) layer into the substrate to form the source and the drain; and forming a gate electrode in the groove.

REFERENCES:
patent: 4786953 (1988-11-01), Morie et al.
patent: 5160491 (1992-11-01), Mori
patent: 5371024 (1994-12-01), Hieda et al.
patent: 5552620 (1996-09-01), Lu et al.
patent: 5587340 (1996-12-01), Yamazaki
patent: 5895951 (1999-04-01), So et al.

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