Method for fabricating MOS transistor utilizing doped disposable

Details Method for fabricating MOS transistor utilizing doped disposable Method for fabricating MOS transistor utilizing doped disposable

1995-06-06

1997-02-04

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437240, 148DIG144, H01L 21225

Patent

active

055997341

ABSTRACT:
A method for fabricating an MOS transistor includes the steps of forming a gate insulating layer on a substrate of a first conductivity-type, forming a gate on the gate insulating layer, forming a disposable layer over an entire surface of the substrate and the gate, the disposable layer having a first conductivity-type impurity and a second conductivity-type impurity of a higher concentration than that of the first conductivity-type impurity, and forming a source and drain area of the second conductivity-type impurity on the substrate by diffusing the second conductivity-type impurity of the disposable layer into the substrate by means of an annealing process, wherein the disposable layer includes a BPSG layer, wherein the BPSG layer is a B+PSG layer which is doped with a higher dopant concentration of boron than that of phosphorus to make a p-type MOS transistor.

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