Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive
Reexamination Certificate
2000-01-14
2001-06-05
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Physical stress responsive
C438S051000
Reexamination Certificate
active
06242276
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a micro inertia sensor, in which thick silicon bonded to glass is processed at a high section ratio.
2. Description of the Related Art
Electrostatic capacity micro inertia sensors are being actively researched and developed. Acceleration sensors have already been manufactured and merchandised, and gyroscopes have been completed in research and development and has entered the initial steps of commercialization. Hence, present research and development into inertia sensors is directed in directions of increasing the reliability and performance and lowering the price. In order to achieve the research and development directions, the area of an inertia sensor measured must be large, and the inertia sensor must be solid on virtue of a high stiffness of a fine structure. Also, the fabrication method of an inertia sensor must be simple.
One method being used up to now in accordance with this trend is a method of fabricating inertia sensors using silicon bonded to glass as shown in
FIGS. 1A
,
1
B and
1
C. This method is disclosed in U.S. Pat. No. 5,492,596, and will now be described with respect to
FIGS. 1A through 3B
.
First, as shown in
FIG. 1A
, when a silicon wafer
100
is bonded to glass, it is etched by about 2 &mgr;m to form a space
102
. Then, as shown in
FIG. 1B
, boron is heavy-doped on the surface of the silicon wafer
100
. As shown in
FIG. 1
C, a boron-doped silicon surface
104
is etched by reactive ion etching (RIE) forming grades
106
. Here, the depth of etching must be slightly deeper than the thickness of the boron-doped silicon surface
104
.
In the meantime, as shown in
FIGS. 2A through 2C
, a multi-metal system
202
is deposited in the grooves
200
with constituent metal layers
210
and
214
metal electrodes
212
and
220
, with stand offs
230
, are formed on glass.
Next, as shown in
FIG. 3A
, glass having electrodes thereon is bonded to the silicon doped with boron. Then, as shown in
FIG. 3B
, a silicon surface
100
doped with no boron is etched by an etchant having different etching speeds depending on the concentration of boron such as EDP, and thus only a boron-doped surface remains.
This fabricating method is complicated, and the depth at which boron is heavy doped is limited. Thus, it is difficult to fabricate a thick (e.g., about 10 &mgr;m) structure, and stresses are generated due to the difference in the concentration at which boron is doped. Also, since glass is bonded to silicon in a narrow space, silicon is attached to glass even in the space
102
by a voltage applied during bonding.
In contrast to the above-described method, there is a method of relatively simply fabricating sensors using only single crystal silicon, as shown in
FIGS. 4A through 4F
. This method, which is generally called single crystal reactive etching and metalization (SCREAM), is disclosed in U.S. Pat. No. 5,198,390.
First, as shown in
FIG. 4A
, a thermal oxide layer
314
is formed on single crystal silicon
312
, and a photoresist pattern is formed by utilizing a photoresist layer
316
. Then, as shown in
FIG. 4B
, the resultant structure is etched by RIE.
Next, as shown in
FIG. 4C
, a silicon oxide layer
332
is formed on lateral surfaces
324
and bottom surfaces
326
. Then, as shown in
FIG. 4D
, a metal layer
334
is deposited, and a photoresist pattern
338
is formed on the resultant structure. Thus, as shown in
FIG. 4E
, the metal layer
334
and the oxide layer
332
are partially removed. At this time, the oxide layer and the metal layer on the bottom surfaces of holes engraved by the first RIE are completely removed.
Thereafter, as shown in
FIG. 4F
, silicon below a structure
354
is etched using a typical silicon isotropic etchant, thereby forming a structure which floats over the bottom.
This method is relatively simple by using only a single crystal line wafer, but also requires two masks. Also, in this method, a metal layer and an oxide layer must be formed on the lateral surface and bottom surface of a narrow and deep groove, and again patterned thereon, so that the section ratio of the etched groove is limited. Therefore, it is difficult to fabricate a structure having a narrow and deep groove. Furthermore, the use of the single crystal line wafer increases the parasitic capacitance upon measurement, and the absence of an etch stop layer upon RIE makes etching to a precise thickness difficult. Thus, the thickness of a structure is entirely non-uniform. Also, the bottom
354
of a beam is also etched by silicon anisotropic etching, thus making it difficult to maintain the thickness of the beam uniform. If no oxide layer is deposited on the upper sidewall
324
of a structure, silicon on the upper portion
354
′ may be etched while silicon on the bottom portion is etched by silicon isotropic etchant for a long time.
SUMMARY OF THE INVENTION
To solve the above problems, an object of the present invention is to provide a method of fabricating micro inertia sensors, in which a thick silicon layer bonded to glass is processed at a high section ratio to increase the area and thickness of measurement, so that the reliability and performance of the sensors are improved, the use of glass, which is a dielectric, instead of silicon as a substrate eliminates a parasitic capacitance which is generally induced via a silicon substrate, and a simple process using only one mask lowers the manufacturing cost.
To achieve the above object, there is provided a method of fabricating a micro inertia sensor, comprising: (a) bonding bulk silicon to a glass substrate; (b) polishing the bonded bulk silicon to have a desired thickness; (c) forming an inertia sensor structure by anisotropically etching the polished bulk silicon; (d) forming a vacuum space by etching glass below the silicon inertia sensor structure; and (e) depositing a metal for use as an electrode on the entire surface of the silicon inertia sensor structure which has been etched.
It is preferable that, in the step (a), the glass substrate is formed of Pyrex® glass, the bulk silicon is n
+
or p
+
-doped bulk silicon, and the glass substrate is bonded to the bulk silicon by anodic bonding.
Also, it is preferable that the anisotropic etching method in the step (c) is a reactive ion etching (RIE) method using a photoresist pattern formed on the polished bulk silicon. Preferably, the RIE method is performed at an etching selectivity of the glass substrate to the bulk silicon which is about 1:100 to 1:300.
It is also preferable that the step (d) is performed using a hydrofluoric (HF) solution.
REFERENCES:
patent: 4699006 (1987-10-01), Boxemhorn
patent: 5198390 (1993-03-01), MacDonald et al.
patent: 5492596 (1996-02-01), Cho
patent: 5610431 (1997-03-01), Martin
patent: 6044705 (2000-04-01), Neukermans et al.
Baek Seog-soon
Ha Byeoung-ju
Oh Young-Soo
Burns Doane , Swecker, Mathis LLP
Nelms David
Nhu David
Samsung Electro-Mechanics Co. Ltd.
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