Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-06-14
2003-06-17
Hu, Shouxiang (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S628000, C438S653000, C438S654000, C438S687000
Reexamination Certificate
active
06579789
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating metal wiring and the metal wiring.
2. Description of the Related Art
As the integration degree of semiconductor devices is increased, the dual damascene process has become widely used as a method for fabricating metal wiring because it can improve device properties and fill up a via for the least cost. And, the damascene process can be widely applied to a logic device and memory device of less than 13 &mgr;m.
Recently, a method for depositing copper by chemical vapor deposition (hereinafter, referred to CVD) has been studied as a method for fabricating the metal wiring by the damascene process. Copper thin film formed by CVD is used because it is relatively easy to provide for step coverage as the design rule of semiconductor devices is gradually narrowed.
Accordingly, it is necessary to apply a diffusion prevention film corresponding to the deposition of copper in the conventional damascene process. TiN and TaN have been widely used as the diffusion prevention film.
However, the conventional diffusion prevention film using TiN and TaN has a problem when manufacturing a semiconductor device having a contact size less than 0.2 &mgr;m×0.2 &mgr;m.
Firstly, in case of a diffusion prevention film of copper using TiN,
A. A first type of metal contact (non-via):
1. The process is complicated because it requires a pre-cleaning process by Ion Metal Plasma (hereinafter, referred to IMP), a CVD process using Ti, and an annealing process.
2. When the contact size is small, it is difficult to fill with copper because an overhang is generated due to the thickness of the Ti/TiN.
3. The substrate may be damaged by the RF Ar process in the IMP process using Ti or CVD using TiN.
B. A second type of metal contact (via)
1. The process is complicated because it requires an RF cleaning process by IMP, a CVD process using Ti, and an annealing process using TiN.
2. When the contact size is small, it is difficult to fill with copper because an overhang is generated due to the thickness of T/TiN.
Secondly, in case of using TaN as the diffusion prevention film,
A. A first metal contact (non-via):
1. The process is complicated because it requires a pre-cleaning process by IMP, a CVD process using Ta, and an annealing process using TaN.
2. When the contact size is small, it is difficult to fill with copper because an the overhang is generated due to the thickness of Ti/TiN.
3. The material cost of Ta used in the CVD process is high.
4. It is difficult to obtain a metal contact resistance.
B. A second type of metal contact (via):
1. The process is complicated because it requires an RF cleaning process by IMP, a CVD process using Ta, and an annealing process using TaN.
2. When the contact size is small, it is difficult to fill with copper because an overhang is generated due to the thickness of Ti/TiN.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide method of fabricating metal wiring and the metal wiring that decrease manufacturing costs and improve device properties by reducing the number of process steps. In an embodiment of the present invention the previous four processing steps necessary for forming a diffusion prevention film reduce to one step using a Ti—Si—N film as a diffusion prevention film.
To achieve the object, a method for fabricating a metal wiring, comprises the steps of: forming an insulation film on a semiconductor substrate, the insulation film having a contact hole exposing the semiconductor substrate; forming a Ti—Si film over the silicon substrate; forming a Ti—Si—N film on the Ti—Si film; filling up the contact hole by depositing copper on the Ti—Si—N film; and forming a silicon nitride film over the silicon substrate.
These and other objects are achieved by providing a metal wiring structure, comprising: an insulation film formed on a semiconductor substrate, the insulation film defining a contact hole exposing a portion of the semiconductor substrate; a Ti—Si film formed on the exposed portion of the semiconductor substrate and sidewalls of the contact hole; a Ti—Si—N film formed on the Ti—Si film; copper formed on the Ti—Si—N film in the contact hole, the copper filling the contact hole; and a silicon nitride layer formed over the semiconductor substrate.
REFERENCES:
patent: 5990008 (1999-11-01), Koyama et al.
patent: 6071552 (2000-06-01), Ku
patent: 6143646 (2000-11-01), Wetzel
patent: 6346741 (2002-02-01), Van Buskirk et al.
patent: 11-40515 (1999-02-01), None
Hu Shouxiang
Hynix / Semiconductor Inc.
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