Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Patent
1999-05-17
2000-11-21
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
697745, H01L 21311, H01L 21302
Patent
active
061502766
ABSTRACT:
A method for fabricating a metal-oxide semiconductor (MOS) transistor on a semiconductor substrate is described. The invention introduces an air chamber with a low dielectric constant between the gate and the source/drain region so as to lower the fringing electric field between the gate and the source/drain region. Moreover, the dielectric constant of the dielectric layer between the gate and the source/drain region is reduced. Therefore, the gate-to-drain capacitance is decreased in the MOS transistor.
REFERENCES:
patent: 5015599 (1991-05-01), Verhaar
patent: 5093275 (1992-03-01), Tasch, Jr.et al.
Hong Gary
Lee Claymens
Huang Jiawei
Umez-Eronini Lynette T.
United Semiconductor Corp.
Utech Benjamin L.
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