Method for fabricating low leakage substrate plate trench DRAM c

Static information storage and retrieval – Systems using particular element – Semiconductive

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365149, 257309, G11C 1300

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active

054065151

ABSTRACT:
Low leakage trenches for Dynamic Random Access Memory (DRAM) cells and the devices formed thereby are disclosed. In one embodiment of the present invention, [the method includes forming] a diffusion ring is surrounding an upper portion of the trench. In another embodiment, a portion of the diffusion ring extends to the surface of a substrate. The diffusion ring can be formed by outdiffusing a dopant from a doped material deposited within the trench. In a further embodiment, the present [method] invention includes [forming] an insulating ring surrounding an upper portion of the trench. The insulating ring can be formed by thermal oxidation or by etching a sidewall shallow trench and depositing an insulating material therein. In another embodiment, a portion of the insulating ring extends to the surface of the substrate.

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Cottrell et al., "N-Well Design for Trench Dram Arrays," 1988 International Electron Devices Meeting Technical Digest, pp. 584-587.
Noble et al., "Parasitic Leakage in Dram Trench Storage Capacitor Vertical," 1987 International Electron Devices Meeting Technical Digest, pp. 340-343.
Chau-Chun Lu et al., "A Substrate-Plate Trench-Capacitor (SPT) Memory Cell for Dynamic RAM's," IEEE Journal of Solid-State Circuits, vol. SC-21, No. 5, Oct. 1986, pp. 627-634.

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