Method for fabricating isolation layer in semiconductor device

Details Method for fabricating isolation layer in semiconductor device Method for fabricating isolation layer in semiconductor device

1997-03-05

1999-04-06

Fourson, George

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

438775, 438448, H01L 2176

Patent

active

058917896

ABSTRACT:
A method for fabricating an isolation layer in a semiconductor device, includes the steps of forming a pad oxide layer on a substrate and sequentially forming a first thin nitride layer, a polysilicon layer and a second nitride layer on the pad oxide layer; selectively and sequentially dry-etching the second nitride layer, polysilicon layer, first nitride layer and pad oxide layer to expose a portion of the substrate corresponding to a field region and to form an active region pattern; growing an oxide layer on the exposed portion of the substrate in the field region; carrying out nitridation onto the polysilicon layer to form a nitride layer on the side of the active region pattern; and performing field oxidation to form a field oxide layer in the field region.

REFERENCES:
patent: 5260229 (1993-11-01), Hodges et al.
A Poly-Buffer Recesed LOCOS Process for 256Mbit DRAM Cells, by N. Shimizu et al, 1992 IEDM, pp. 10.6.1-10.6.4.

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