Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Compound semiconductor
Reexamination Certificate
2002-03-26
2004-06-29
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Compound semiconductor
C438S022000, C438S039000, C438S462000
Reexamination Certificate
active
06756246
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method for fabricating a gallium nitride (GaN)-based III-V Group compound semiconductor.
2. Background Art
GaN-based III-V Group compound semiconductors represented by the general formula InxGayAlzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1) can be adjusted in direct band gap energy by varying the III Group element content. As this makes them adaptable to optical energies of wavelengths from ultraviolet to red, they are usable as high-efficiency light-emitting element materials over a range extending from ultraviolet to visible light. Moreover, since they have a larger band gap than Si, GaAs and other such semiconductors widely used up to now, they can maintain the characteristics of a semiconductor up to high temperatures at which conventional semiconductors cannot operate. This property is basically utilizable to fabricate electronic devices with excellent environmental resistance.
Owing to the very high vapor pressure of GaN-based III-V Group compound semiconductors in the vicinity of the melting point, however, growth of a large crystal is extremely difficult and a crystal of a size practical for use as a substrate for fabricating semiconductor chips cannot be obtained. The general practice in fabricating compound semiconductors is therefore to use a substrate of sapphire, SiC or other material that has a crystal structure similar to the compound semiconductor and enables large crystal fabrication and to epitaxially grow a desired single crystal thin-film layer on the substrate. Relatively good quality crystals of these compound semiconductors have now become obtainable by using this method. Even when this method is used, however, reduction of crystal defects caused by differences in lattice constant and/or coefficient of thermal expansion between the substrate material and the compound semiconductor is difficult. Defect densities on the order of 10
8
cm
−2
or greater are typical. This is a problem in light of the strong demand for bulk GaN substrates with low dislocation densities for fabrication of high-performance GaN-based devices.
Against this backdrop, a method has been reported for treating such a compound semiconductor having high crystal defect density to obtain a compound semiconductor with reduced defect density (Jpn. J. Appl. Phys., vol. 36, p L899, 1997). The reported method consists in covering the surface of the compound semiconductor having high defect density (hereinafter called the “base crystal”) with a SiO
2
pattern including minute openings and then conducting crystal growth a second time on this surface to grow the desired compound semiconductor with few crystal defects. In the explanation that follows, the second and later crystal growths are referred to as “regrowths.”
At the initial stage of regrowth by this method, selective growth proceeds in which crystal growth occurs only at the openings and not on the SiO
2
pattern. As crystal growth continues beyond this stage, the crystal grown at the openings also spreads over the SiO
2
pattern to eventually produce a structure that overgrows the SiO
2
pattern. Just after the SiO
2
pattern has been overgrown, the surface of the crystal formed by the regrowth includes irregularities and is not flat. With continued crystal growth, however, the irregularities of the regrown surface diminish and a flat crystal surface can be obtained in the end. It has been ascertained that the formation of such an overgrown structure enables the dislocation density at the regrown layer to be reduced markedly from that of the base crystal.
When reduction of dislocation density by epitaxial lateral overgrowth (ELO) is attempted, however, the mechanism of the defect reduction by the aforesaid regrowth differs depending on the growth method and/or growth conditions. Broadly viewed, the mechanism falls into the following two types. In the first type, as shown in
FIG. 10
, the regrown layer
101
inherits the threading dislocations
103
of the base layer
102
. On the other hand, no dislocations occur in the regrown layer
101
above the pattern
104
because the dislocations of the base layer
102
are terminated by the pattern
104
. In this case, however, reduction of dislocation is possible only in the regrown layer
101
above the pattern
104
. In the regrown layer
101
above the openings
104
A of the pattern
104
, dislocations inherited from the base layer
102
thread into the regrown layer
101
so that substantially no reduction of dislocations can be expected in these regions.
In the second type, as shown in
FIG. 11
, dislocations are reduced owing to the formation of facets by the regrown layer
101
above the openings
104
A of the pattern
104
. The growth surfaces of the threading dislocations
103
inherited from the base layer
102
are bent by the facets of the regrown layer
101
so that the defect density decreases with increasing thickness of the grown film. While in the case of the second mechanism, differently from the first, the dislocation density above the openings
104
A is low but the dislocations concentrate in the regions above the pattern
104
. Thorough reduction of these dislocations requires growth of the regrown layer
101
to a considerable thickness of several tens of micrometers.
As the thickness of the compound semiconductor film including the regrown layer on the substrate increases, strain increases owing mainly to difference in coefficient of thermal expansion relative to the substrate. When the overall thickness of the compound semiconductor film reaches several tens of micrometers, this stress is liable to produce cracks and other defects in the substrate and/or the compound semiconductor. In some cases moreover, a large deformation may occur that makes the wafer radius of curvature smaller than 1 meter. Such a heavily deformed wafer causes various problems in the semiconductor fabrication process, such as that focusing becomes difficult during patterning in fine semiconductor processes.
SUMMARY OF THE INVENTION
One object of the present invention is therefore to provide a method for fabricating a III-V Group compound semiconductor that overcomes the foregoing problems of the prior art.
Another object of the present invention is to provide a method for fabricating a III-V Group compound semiconductor with low dislocation density.
Another object of the present invention is to provide a method utilizing epitaxial lateral overgrowth technology for fabricating a III-V Group compound semiconductor that has a III-V Group compound semiconductor of low dislocation density on a compound semiconductor of high defect density.
The present invention achieves these objects by providing a method for fabricating a III-V Group compound semiconductor comprising a step of preparing a base crystal containing a gallium nitride-based compound semiconductor, a step of forming a mask pattern on the base crystal, and a regrowth step of fabricating an overgrowth structure of a gallium nitride-based compound semiconductor having a flat surface on the base crystal formed with the mask pattern by a regrowth method, the regrowth step including a process of once annihilating a plane parallel to the base crystal by a facet group including at least a {33-62} facet.
The mask pattern is preferably a stripe pattern parallel to the <1-100> direction. In a preferred aspect of the invention, the regrowth utilizes the hydride vapor phase growth method, with mixed hydrogen gas and nitrogen gas being used as carrier gas. Parallel plane annihilation can be conducted by controlling the mixing ratio of the mixed carrier gas to control formation of the facet group. The AlN content of the base crystal is preferably not less than 1%.
This invention will be better understood and other objects and advantages thereof will be more apparent from the following detailed description of preferred embodiments with reference to the accompanying drawings.
REFERENCES:
patent: 6348096 (2002-02-01), Suna
Bohyama Shinya
Hiramatsu Kazumasa
Iyechika Yasushi
Maeda Takayoshi
Miyake Hideto
Lebentritt Michael S.
Sumitomo Chemical Company Limited
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