Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2002-10-07
2004-05-18
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S780000, C438S782000, C438S788000, C438S792000
Reexamination Certificate
active
06737364
ABSTRACT:
This invention relates to a method for forming and depositing thin films of crystalline dielectric materials on a substrate, and devices formed using this thin film technique. The thin film devices are made by the method of the invention and form a part of a variety of thin film devices, such as, capacitors, field effect transistors, memory devices and the like.
BACKGROUND OF THE INVENTION
In recent years there has been significant effort focused on integrating perovskite-type insulators (most notably Barium Strontium Titanate, or BST) into high-density DRAM memory structures. These materials are crystalline dielectric materials, which exhibit large dielectric responses (relative to conventional amorphous dielectric materials, such as SiO
2
) due to ionic displacements within their crystal lattice. Similarly, there have been renewed efforts to develop viable high-density, non-volatile memory circuits based on ferroelectric dielectric materials. Ferroelectric materials are also crystalline dielectric materials and also possess the additional property of a permanent electric dipole moment whose orientation direction can be changed with an external electric field. From a fabrication standpoint, combining these crystalline dielectric materials with silicon processing poses serious difficulties. For example, forming the proper crystal structure (to obtain desired dielectric properties) requires high processing temperatures, which can have a detrimental effect on other parts of the circuit. Also, because these dielectric materials are crystalline, a film thereof has a grain structure and orientation that play a crucial role in determining device characteristics, such as leakage and polarization.
Recent work has shown that the grain size in crystalline dielectric films (in particular, much work has been done on BST) can be influenced somewhat by film deposition conditions. Upon crystallization to the high-dielectric phase, some films can become quite porous. Voids between grains in the dielectric can cause electrical shorts for sufficiently thin films. Problems associated with film grain size have become important as attempts are made to fabricate devices that are roughly the same size as the film granularity. These problems can be demonstrated with an example of a high density memory device.
Referring to
FIG. 1
, a high density memory device
10
includes a transistor
12
disposed below a capacitor
14
. Transistor
12
and capacitor
14
are connected through a polycrystalline silicon (poly-Si) plug
16
. The capacitor contains a crystalline dielectric material.
FIG. 2
shows a difficulty in fabricating high density memory device
10
. In order to obtain the proper crystal phase (with desirable properties) of the crystalline dielectric material, it is often necessary to subject the crystalline dielectric material to a high-temperature (>600° C.) anneal in oxygen. However, this process is detrimental to the rest of high-density memory device
10
, because at high temperature, the oxygen diffuses down to and oxidizes poly-Si plug
16
it, converting it from a conductor to an insulator, thereby rendering high density memory device
10
inoperable.
Efforts have been made to develop a conducting barrier layer to place between a bottom electrode of capacitor
14
and poly-Si plug
16
. The requirements for such a barrier are stringent, i.e., it must be electrically conducting, stop oxygen diffusion, and be non-reactive with oxygen at temperatures up to >600° C. These problems are major obstacles to the development high-density memory devices using crystalline dielectric materials.
SUMMARY OF THE INVENTION
The present invention pertains to a method for fabricating a thin film on a substrate. A plurality of nanoparticles that is initially in a solvent is deposited on the substrate in such a way that the nanoparticles form a monolayer on the substrate. The nanoparticles are coated with an organic surfactant and are electrically insulating with relative dielectric constant greater than 10. The percentage of the thin film comprised of nanoparticles is preferably in a range of about 50% to about 100%.
The nanoparticles preferably have a diameter size in the range between about 2 nm to about 20 nm. In another embodiment, the distribution of the diameter size in the thin film has a standard deviation selected from the group consisting of: less than 15%, less than 10% and less than 5%.
In another embodiment of the method of the invention, the nanoparticles are deposited from a solvent solution onto a liquid subphase. The solvent is then evaporated so that a closely packed monolayer of the nanoparticles is formed at the subphase liquid to air interface. A deposition step then transfers the closely packed monolayer of nanoparticles to the substrate.
In another embodiment of the method of the invention, the nanoparticles are heated or sintered after deposition on the substrate to form the thin film. Preferably, the surfactant is removed by the heating step.
The heating is carried out in a temperature range of preferably about 100°C. to about 800° C. and more preferably about 300° C. to about 650° C. The heating is carried out using a conventional oven or furnace, rapid thermal processing (RTA) or irradiation from a laser, a microwave, an electron beam or an ion beam.
Preferably, the above mentioned steps of depositing the nanoparticles on the substrate and heating the substrate and nanoparticles are repeated to increase thickness of the thin film.
Preferably, the nanoparticles are composed of a perovskite-type oxide having the formula ABO
3
, wherein A is at least one additional cation having a positive formal charge in the range between about 1 to about 3; and wherein B is at least one acidic oxide containing a metal selected from Group IVB, VB, VIB, VIIB, IIIA, and IB metals.
The nanoparticles are preferably a pervoskite-type oxide selected from the group consisting of: a titanate-based ferroelectric, a manganate-based material, a cuprate based material, a tungsten bronze-type niobate, tantalate or titanate, or a layer bismuth tantalate, niobate, or titanate.
The nanoparticles are optionally a ferroelectric material selected from the group consisting of: bismuth titanate, strontium bismuth tantalate, strontium bismuth niobate, strontium bismuth tantalate niobate, lead zirconate titanate, lead lanthanum zirconate titanate, lead titanate, bismuth titanate, lithium niobate, lithium tantalate, strontium rhuthenate, barium titanite, strontium titanate and compositions of these materials modified by incorporation of a dopant.
The nanoparticles are preferably formed with a non-aqueous chemical process that injects metal oxide precursors at temperatures in the range between about 60° C. to about 300° C. or the precursors are added at low temperature and then heated to between about 60° C. to about 300° C.
In other embodiments, the nanoparticles are formed in a predetermined crystalline phase by synthesis or heating.
The solvent is preferably a material with an end functional group selected from the radical consisting of: —COO—, —CON—, —CN, —NC, —S—, —O—, —N—, —P—, —C═C—, and —C≡C—. The solvent is preferably evaporated at temperatures in the range between about 0° C. to about 150° C., more preferably between about 20° C. to about 40° C.
The solvent is preferably selected from the group consisting of: ethers, alcohols, arenes, chlorinated, fluorinated, —COO—, —CON—, —CN—, NC—, —S—, —O—, —N— and —P—.
The thin film produced according to the present invention can be used to fabricate capacitors, field effect transistors and other devices.
REFERENCES:
patent: 6254662 (2001-07-01), Murray et al.
patent: 6262129 (2001-07-01), Murray et al.
patent: 6265021 (2001-07-01), Black et al.
patent: 6302940 (2001-10-01), Murray et al.
patent: 6416855 (2002-07-01), Rossignol
patent: 6558448 (2003-05-01), Hu
Black Charles
Murray Christopher Bruce
Berry Renee R
Cheung Wan Yee
Ohlandt Greeley Ruggiero & Perle L.L.P.
LandOfFree
Method for fabricating crystalline-dielectric thin films and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating crystalline-dielectric thin films and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating crystalline-dielectric thin films and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3207640