Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2007-09-18
2007-09-18
Chambliss, Alonzo (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S458000, C438S464000, C257S724000, C257S758000, C257S782000
Reexamination Certificate
active
10977289
ABSTRACT:
An integrated chip package structure and method of manufacturing the same is by adhering dies on a metal substrate and forming a thin-film circuit layer on top of the dies and the metal substrate. Wherein the thin-film circuit layer has an external circuitry, which is electrically connected to the metal pads of the dies, that extends to a region outside the active surface of the dies for fanning out the metal pads of the dies. Furthermore, a plurality of active devices and an internal circuitry is located on the active surface of the dies. Signal for the active devices are transmitted through the internal circuitry to the external circuitry and from the external circuitry through the internal circuitry back to other active devices. Moreover, the chip package structure allows multiple dies with different functions to be packaged into an integrated package and electrically connecting the dies by the external circuitry.
REFERENCES:
patent: 5250843 (1993-10-01), Eichelberger
patent: 5324687 (1994-06-01), Wojnarowski
patent: 5353498 (1994-10-01), Fillion et al.
patent: 5611884 (1997-03-01), Bearinger et al.
patent: 6033939 (2000-03-01), Agarwala et al.
patent: 6110806 (2000-08-01), Pogge
patent: 6271469 (2001-08-01), Ma et al.
patent: 6555908 (2003-04-01), Eichelberger et al.
patent: 6673698 (2004-01-01), Lin et al.
patent: 6746898 (2004-06-01), Lin et al.
patent: 6800941 (2004-10-01), Lee et al.
patent: 7087460 (2006-08-01), Lee
Huang Ching-Cheng
Lee Jin-Yuan
Lin Mou-Shiung
Chambliss Alonzo
Hsu Winston
MEGICA Corporation
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