Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-05-17
2002-07-02
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S288000, C257S310000, C438S387000, C438S396000, C438S762000, C438S769000, C438S775000, C438S785000, C438S791000
Reexamination Certificate
active
06414348
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a capacitor in a semiconductor device.
2. Background of the Related Art
In general, as high density device packing is advanced, different methods for stable driving of the device are suggested, such as technology employing tungsten-bitlines or cobalt suicide in case of embedded DRAM. However, the tungsten-bitline limits heat treatment conditions after formation of the tungsten-bitline, and to prevent device deterioration, the heat treatment after the bitline formation is limited to be carried out at 800° C. within 10 min.
A related art method for fabricating a capacitor in a semiconductor device will now be described with reference to the attached drawings. FIGS.
1
A~
1
D illustrate cross-sections showing the steps of the related art method for fabricating a capacitor in a semiconductor device.
Referring to
FIG. 1A
, a plurality of wordlines
13
are formed on a semiconductor substrate
11
with an insulating film
12
inbetween. A first impurity diffusion region
14
and a second impurity diffusion region
14
a
are formed in the substrate on both sides of each of the wordlines
13
. Then, a first insulating layer
15
is formed on the semiconductor substrate
11
inclusive of the wordlines
13
and subjected to photo etching to selectively remove the first insulating layer
15
and form a bitline contact hole
16
that exposes the first impurity region
14
. As shown in
FIG. 1B
, a bitline
17
is formed, which is electrically connected to the first impurity diffusion region
14
through the bitline contact hole
16
. The bitline
17
is a stack of layers of titanium (Ti)-titanium nitride (TiN)-tungsten (W) in sequence. A second insulating layer
18
is formed on the first insulating layer
15
inclusive of the bitline
17
. The second insulating layer
18
and the first insulating layer
15
are selectively removed by photo etching to form a storage node. contact hole
19
that exposes the second impurity diffusion region
14
a.
As shown in
FIG. 1C
, a conductive material
20
is deposited on the second insulating layer
18
inclusive of the storage node contact hole
19
. A planarizing is conducted to stuff the conductive material
20
in the storage node contact hole
19
in electrical connection to the second impurity diffusion region
14
a
. Then, a material for a capacitor lower electrode is deposited on the second insulating layer
18
inclusive of the conductive material
20
and patterned to form a capacitor lower electrode
21
electrically connected to the conductive material
20
. Then, a Rapid Thermal Nitridation (RTN) is conducted at approximately 800° C., to form a nitride film
22
on a surface of the capacitor lower electrode
21
to a thickness of 7~15 Å. Then, a Ta
2
O
5
film
23
is deposited on the nitride film
22
as a capacitor dielectric film, and subjected to dry-O
2
heat treatment in a furnace at an elevated temperature higher than 800° C., to form an SiON film
22
a
at an interface between the Ta
2
O
5
film
23
and the capacitor lower electrode
21
as a result of oxidation of the nitride film
22
. The SiON film
22
a
is shown in FIG.
1
D. In this instance, a Rapid Thermal Oxidation (RTO) may be employed in place of the dry-O
2
heat treatment at an elevated temperature higher than 800° C. The high temperature heat treatment is carried out to improve leakage current characteristics. Then, an upper electrode
24
is formed on the Ta
2
O
5
film
23
to complete fabrication of the related art capacitor.
As described above, the related art method for fabricating a capacitor in a semiconductor device has various disadvantages. First, as the high density device packing advances, a load on a bitline is increased. When a tungsten-bitline is employed for solving this problem, a heat treatment temperature required for formation of the capacitor is limited. When the Ta
2
O
5
film
23
is heat treated at a temperature equal to or higher than 800° C. for more than 10 minutes, the tungsten of the bitline is deformed, which causes an increased resistance. Further, an inter-diffusion between the substrate and the bitline increases a bitline resistance. Second, when a capacitor in an embedded DRAM is formed, a dry-O
2
process that requires a temperature higher than 800° C. can not be applied in formation of a Ta
2
O
5
film. Third, RTO may be employed in place of dry-O
2
heat treatment. However, RTO requires much more time because diffusion of the oxygen ion is slow.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for fabricating a capacitor in a semiconductor device that substantially obviates one or more of the problems caused by limitations and disadvantages of the related art and to provide at least the advantages described hereinafter.
Another object of the present invention is to provide a method for fabricating a capacitor in a semiconductor device that decreases or prevents a device deterioration caused by heat treatment.
Another object of the present invention is to provide a method for fabricating a capacitor in a semiconductor device that improves a leakage current characteristic.
Another object of the present invention is to provide a method for manufacturing a capacitor in a semiconductor device that increases device reliability.
To achieve at least these objects and other advantages in a whole or in parts, and in accordance with the purpose of the present invention, as embodied and broadly described, a method for fabricating a capacitor in a semiconductor device includes forming a nitride film on a capacitor lower electrode, depositing a Ta
2
O
5
film on the nitride film as a capacitor dielectric film, and heat treating by a rapid thermal process using N
2
O gas to form an SiON film at an interface between the capacitor lower electrode and the Ta
2
O
5
film, and forming a capacitor upper electrode on the Ta
2
O
5
film.
To achieve at least these objects and other advantages in a whole or in parts, and in accordance with the purpose of the present invention, as embodied and broadly described, a method for fabricating a capacitor in a semiconductor device, the capacitor using Ta
2
O
5
as a dielectric film, the method includes the steps of (a) forming a wordline on a substrate, (b) forming first and second impurity diffusion regions in the substrate on opposite sides of the wordline, respectively, (c) forming a bitline electrically coupled to the first impurity diffusion region, (d) forming a capacitor lower electrode electrically coupled to the second impurity diffusion region, (e) forming a nitride film on a surface of the capacitor lower electrode, (f) depositing a Ta
2
O
5
film on the nitride film and performing a heat treatment by a rapid thermal process using N
2
O gas to form an SiON film at an interface between the capacitor lower electrode and the Ta
2
O
5
film, and (g) forming a capacitor upper electrode on the Ta
2
O
5
film.
To achieve at least these objects and other advantages in a whole or in parts, and in accordance with the purpose of the present invention, as embodied and broadly described, a method for fabricating a capacitor in a semiconductor device includes forming a nitride film on a capacitor lower electrode, depositing a Ta
2
O
5
film on the nitride film, performing a rapid thermal process heat treatment process conducted in the range of approximately 650~750° C. that forms an SiON film at an interface between the capacitor lower electrode and the Ta
2
O
5
film, and forming a capacitor upper electrode on the Ta
2
O
5
film.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill
Cho Bok Won
Seo Su Jin
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
Wojciechowicz Edward
LandOfFree
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