Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-03-15
2005-03-15
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06868530
ABSTRACT:
A method for fabricating a semiconductor circuit uses a computer program to compute a circuit diagram that is made up of a large number of surface cells, each having a uniform height. Space-saving layouts require a uniform cell height for all the surface cells. The height is conventionally prescribed by a computer file containing standardized dimensions for a large number of surface cells. Accordingly, such surface cells as are required for a specific semiconductor circuit that is to be fabricated are selected, and the selection is used to compute a circuit-specific uniform cell height. The height is less than the height prescribed by the computer file and results in surface area being saved on the semiconductor chip.
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Keiner Klaus
Wagner Michael
Dimyan Magid Y.
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Siek Vuthe
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