Method for fabricating a via

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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Details

438622, 438627, 438689, 438704, H10L 21283

Patent

active

06100183&

ABSTRACT:
A method for fabricating a via that uses a hard etching mask for etching the via. A photoresist layer used to pattern the hard etching mask is removed before starting the via etching. The hard etching mask includes a TiN etching mask, a silicon nitride etching mask, and a oxide/TiN etching mask. For each different etching mass, the TiN etching mask is not necessarily removed after etching; the silicon nitride etching mask is removed after etching; the oxide layer in the oxide/TiN etching mask is sacrificial layer.

REFERENCES:
patent: 5932487 (1999-08-01), Lou et al.

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