Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2009-09-23
2011-10-04
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S106000, C438S680000, C438S780000, C257SE21006, C257SE21007, C257SE21077, C257SE21170, C257SE21267, C257SE21499, C257SE21502, C257SE21508
Reexamination Certificate
active
08030200
ABSTRACT:
A method for fabricating a semiconductor package, includes the steps of forming a first terminal at a first substrate; mixing a polymer resin and solder particles to provide a mixture; covering at least one of an upper surface and side surfaces of the first terminal with the mixture; and heating the first substrate at a temperature higher than a melting point of the solder particles of the mixture to form a solder layer that covers the at least one of an upper surface and a side surface of the first terminal. The solder particles flow or diffuse toward the terminal in the heated polymer resin to adhere to at least some of the exposed surfaces of the terminal thereby forming the solder layer. The solder layer improves the adhesive strength between the terminals of the semiconductor chip and the substrate in the subsequent flip chip bonding process.
REFERENCES:
patent: 5136365 (1992-08-01), Pennisi et al.
patent: 6064120 (2000-05-01), Cobbley et al.
patent: 6878435 (2005-04-01), Paik et al.
patent: 7227267 (2007-06-01), Lee et al.
patent: 2010/0006625 (2010-01-01), Eom et al.
patent: 1445995 (2004-08-01), None
patent: 2007-0052791 (2007-05-01), None
Jong-Min Kim et al., “New Electrically Conductive Adhesives Filled with Low-Melting-Point Alloy Fillers” Materials Transactions, vol. 45, No. 1 (2004) pp. 157 to 160.
Bae Hyun-Cheol
Choi Kwang-Seong
Eom Yong Sung
Lee Jong-Hyun
Moon Jong Tae
Electronics and Telecommunications Research Institute
Nhu David
Rabin & Berdo PC
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