Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate
Reexamination Certificate
2000-11-28
2003-09-16
Cuneo, Kamand (Department: 2829)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
C438S510000, C257S607000
Reexamination Certificate
active
06620708
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a semiconductor device, and more particularly, to a method for fabricating a semiconductor device, which improves doping efficiency to increase capacitance.
2. Background of the Related Art
Generally, a semiconductor device utilizes hemispherical grain (HSG) formation to increase capacitance. However, the HSG is only formed on silicon (Si) which is not completely doped. Accordingly, additional doping is required after the HSG is formed. Performing the additional doping uses either rapid thermal chemical vapor deposition (RTCVD) equipment or a furnace.
A related art method for fabricating a semiconductor device is described in
FIGS. 1A
to
1
E, which are sectional views showing related art fabricating process steps of a semiconductor device.
FIG. 1A
shows a silicon film
12
having low doping density deposited on a semiconductor substrate or an insulating film
11
.
FIG. 1B
shows annealing performed under high temperature and high vacuum to move or rearrange the silicon atoms of the silicon film
12
, so that an HSG
12
a
having a spherical projection is formed. During the annealing process, if the doping density of the silicon film
12
is greater than a certain value, the crystallization energy barrier of the silicon becomes lower due to the presence of dopants doped on the silicon film
12
. For this reason, the silicon crystallizes prematurely. This premature crystallization prevents the silicon atoms from moving smoothly to form the HSG structure. As a result, bald defects occur when forming the HSG
12
a
. Accordingly, it is necessary to control the silicon film
12
to have low density.
Subsequently, as shown in
FIG. 1B
, an oxide film and particles formed on a surface of the silicon film
12
are removed using a washing solution. Any one of SC
1
solution, HF solution, and a mixing solution of SC
1
and HF is used as the washing solution. SC
1
solution is composed of an ammonia solution, oxygenated water and H
2
O.
FIG. 1C
shows impurities doped on the silicon film
12
on which the HSG
12
a
is formed using RTCVD equipment or a furnace, so that a lower electrode
12
b
(shown in
FIG. 1E
) is formed. At this time, the doping process is performed at temperatures between about 700° C. and 950° C. in an atmosphere of PH
3
or POCl
3
gas.
Afterwards, as shown in
FIG. 1D
, the surface of the silicon film
12
is washed again using any one of a SC
1
solution, a HF solution or a mixture of SC
1
and HF solutions, to remove the oxide film and organic materials.
FIG. 1E
shows a dielectric film
13
is formed on the lower electrode
12
b
. Any one of oxide-nitride-oxide (ONO) film, nitride-oxide (NO) film and Ta
2
O
5
film is used as the dielectric film
13
. Finally, an upper electrode
14
is formed on the dielectric film
13
, so that the related art semiconductor device is completed.
The related art methods for fabricating a semiconductor device have problems, which reduce the quality of the finished device and increase production costs. Manufacturing difficulties arise from the washing process being performed both before and after the doping process to remove the oxide film and the organic materials. As a result, doping efficiency is remarkably reduced, thereby reducing the capacitance. This reduced capacitance is also related to the reduced surface area of the silicon film arising from the imperfections in the HSG structure.
Additional disadvantages arise from the multiple washing steps using aggressive solvent solutions such as HF solution and SC
1
. These solutions are expensive to buy and maintain sufficiently pure and particle-free for semiconductor manufacturing. These aggressive solvents also pose hazards to the clean room personnel. As a result, a process improvement that eliminates a washing step reaps economic benefits through lower production costs and enhanced worker safety.
SUMMARY OF THE INVENTION
The invention, in part, provides a method for fabricating a semiconductor device that substantially eliminates one or more of the problems due to limitations and disadvantages of the related art.
The invention, in part, provides a method for fabricating a semiconductor device that improves doping efficiency to increase the capacitance.
The invention, in part, provides a method for fabricating a semiconductor device that eliminates at least one washing step with an aggressive solvent.
The invention, in part, provides a method for semiconductor fabrication that provides an improved HSG structure.
The invention, in part, provides a method of semiconductor fabrication which includes the steps of forming a silicon film on a semiconductor substrate, forming an HSG having a spherical projection on a surface of the silicon film, removing any debris by washing the surface of the silicon film on which the HSG is formed, forming a lower electrode by increasing the density of impurities of the silicon film by a doping process, and sequentially forming a dielectric film and an upper electrode on the silicon film, in which the density of the impurities is increased, without any washing process.
The invention, in part, provides a semiconductor device made according to the method of the invention.
Advantages of the present invention will become more apparent from the detailed description given herein after. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
REFERENCES:
patent: 5623243 (1997-04-01), Watanabe et al.
patent: 6013549 (2000-01-01), Han et al.
patent: 6046082 (2000-04-01), Hirota
patent: 6124166 (2000-09-01), Wang et al.
patent: 6211077 (2001-04-01), Shimizu et al.
patent: 6323511 (2001-11-01), Marsh
patent: 6403407 (2002-06-01), Andry et al.
Geyer Scott B.
Hynix Semiconductor
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