Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2006-05-09
2006-05-09
Chaudhan, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S367000
Reexamination Certificate
active
07041564
ABSTRACT:
According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a sacrificial post which, in one exemplary embodiment, is situated between first and second link spacers. The bipolar transistor also comprises a conformal layer situated over the sacrificial post. The conformal layer may comprise silicon oxide, for example. According to this exemplary embodiment, the bipolar transistor further comprises a sacrificial planarizing layer situated over the conformal layer, the sacrificial post, and the base. The sacrificial planarizing layer has a first thickness in a first region between the first and second link spacers and a second thickness in a second region outside of the first and second link spacers, where the second thickness is generally greater than the first thickness. Another embodiment is a method that achieves the above-described bipolar transistor.
REFERENCES:
patent: 4885614 (1989-12-01), Furukawa et al.
patent: 5093272 (1992-03-01), Hoepfner et al.
patent: 6020246 (2000-02-01), Koscielniak et al.
Kalburge Amol
Racanelli Marco
Chaudhan Chandra
Farjami & Farjami LLP
Newport Fab LLC
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