Method for fabricating a self-aligned bipolar transistor...

Details Method for fabricating a self-aligned bipolar transistor... Method for fabricating a self-aligned bipolar transistor...

2005-12-27

2005-12-27

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Having heterojunction

C438S364000, C438S320000

Reexamination Certificate

active

06979626

ABSTRACT:
According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a base oxide layer situated on top surface of the base. The bipolar transistor further comprises a sacrificial post situated on the base oxide layer. The bipolar transistor further comprises a conformal layer situated over the sacrificial post and top surface of the base, where the conformal layer has a density greater than a density of the base oxide layer. The conformal layer may be, for example, HDPCVD oxide. According to this exemplary embodiment, the bipolar transistor further comprises a sacrificial planarizing layer situated over the conformal layer. The sacrificial planarizing layer has a first thickness in a first region between first and second link spacers and a second thickness in a second region outside of first and second link spacers, where the second thickness is generally greater than the first thickness.

REFERENCES:
patent: 6171910 (2001-01-01), Hobbs et al.
patent: 6524901 (2003-02-01), Trivedi
patent: 6638873 (2003-10-01), Furukawa
patent: 2003/0057458 (2003-03-01), Freeman et al.
patent: 2003/0092286 (2003-05-01), Furukawa
patent: 2003/0109109 (2003-06-01), Freeman et al.

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