Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1996-10-09
1997-08-26
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438787, H01L 21265
Patent
active
056610513
ABSTRACT:
A polysilicon transistor having a buried-gate structure is fabricated by a method involving a liquid phase deposition which is used for depositing selectively a silicon dioxide layer on a polysilicon layer, but not on a photoresist layer. The silicon dioxide liquid phase deposition is brought about by using an aqueous hydrofluorosilicic acid (H.sub.2 SiF.sub.6) solution supersaturated with silicon dioxide. Upon completion of the stripping of the photoresist layer, the selectively-deposited silicon dioxide layer is used as a mask to perform the source/drain ion implant.
REFERENCES:
patent: 4381202 (1983-04-01), Mori et al.
patent: 4746377 (1988-05-01), Kobayashi et al.
patent: 5120666 (1992-06-01), Gotou
patent: 5188973 (1993-02-01), Omura et al.
patent: 5401685 (1995-03-01), Ha
patent: 5426062 (1995-06-01), Hwang
patent: 5510278 (1996-04-01), Nguyen et al.
patent: 5580802 (1996-12-01), Mayer et al.
Li-Rou Shiu, Chun-Lin Chen and Ching-Fa Yeh, "Novel Silicon Dielectric Selectively Deposited on Silicon Substrate," 1995 Annual Conference of the Chinese Society for Material Science, pp. 276-277, Apr. 21-22, 1995.
C.F. Yeh, C.L.Chen and G.H. Lin, "The Physicochemical Properties and Growth Mechanism of Oxide (SiO.sub.2-x F.sub.x) by Liquid Phase Deposition with H.sub.2 O Addition Only," J. Electrochem. Soc., vol. 141, No. 11, 3177 (1994). Month Unknown.
James R. Pfiester et al., "A Novel PMOS SOI Polysilicon Transistor," IEEE Electron Device Letters, vol. 11, No. 8, Aug. 1990, pp. 349-351.
Jeng Jyh-Nan
Yeh Ching-Fa
Lebentritt Michael S.
National Science Council
Niebling John
LandOfFree
Method for fabricating a polysilicon transistor having a buried- does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating a polysilicon transistor having a buried-, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating a polysilicon transistor having a buried- will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1987726