Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Compound semiconductor
Reexamination Certificate
2003-06-20
2004-07-20
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Compound semiconductor
C438S047000
Reexamination Certificate
active
06764871
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a method for fabricating a nitride semiconductor device. Specifically, the present invention relates to a method for fabricating nitride semiconductor devices, such as semiconductor lasers, light emitting diodes, ultraviolet detectors and like GaN based light receiving/emitting devices, the application of which is anticipated in the field of optical information processing; and field-effect transistors, transistors with high electron mobility, and like GaN based electron devices, the application of which is anticipated in the field of high-frequency and high-output communications.
BACKGROUND ART
Group III-Group V nitride semiconductors that contain nitrogen (N) in the Group V element are excellent candidates as useful materials for short-wavelength light emitting devices because of their wide band gap. Among these, extensive research has been conducted on gallium nitride based compound semiconductors (AlGaInN and like GaN based semiconductors), and blue light emitting diodes (LED), and green LEDs have already been put to practical use. Furthermore, in order to increase the storage capacity of an optical disc apparatus, a semiconductor laser with its oscillation wavelength in the 400-nm band is in strong demand. For this reason, semiconductor lasers using GaN based semiconductors have attracted widespread attention, and are now approaching a level of practical use.
Furthermore, since the nitride semiconductor has a wide band gap as described above, as well as an electric field with high dielectric breakdown and high electron saturation drift velocity, it is believed that development of a GaN based transistor that can be operated under high temperatures and high electric power, and that has a high-speed switching characteristic, is feasible, thus leading to its research. The performance of this GaN based transistor is expected to be superior to the heretofore-used silicon (Si) based and gallium arsenide (GaAs) based transistors.
According to examples of prior art (laser structure: Appl. Phys. Lett., VOL. 69, NO. 26, P4056-4058 (1996), and transistor structure: Appl. Phys. Lett., VOL. 73, NO. 21, P3147-3149 (1998)), the GaN based semiconductor device structure is fabricated onto a sapphire substrate in the following manner using metalorganic vapor phase epitaxy (MOVPE) technique.
First, a GaN low-temperature deposited layer or an AlN low-temperature deposited layer is grown on the substrate on top of which a GaN layer is subjected to crystal growth until the thickness thereof becomes 1 &mgr;m to 10 &mgr;m. This method is called a two-step growth method. Then, using the resulting GaN layer as a template, AlGaInN based heterostructures are formed one by one to obtain the GaN based semiconductor device structure.
Such a film formation method in which a semiconductor crystal is grown on a substrate is disclosed, for example, in Japanese Unexamined Patent Publication No. 1997-40490, Japanese Unexamined Patent Publication No. 1996-8185, Japanese Unexamined Patent Publication No. 1993-82447, etc. According to the method for preparing a GaN crystal disclosed in Japanese Unexamined Patent Publication No. 1997-40490, the temperature program shown in
FIG. 10
is followed wherein, first, the surface of the sapphire substrate is treated under a hydrogen atmosphere at 1,125° C. Then, the temperature is lowered to 550° C. and the low-temperature deposited layer of AlN is grown. Thereafter, the temperature is raised to 1,000° C. and, after the GaN layer is grown, the substrate is cooled.
It has long been known that the GaN layer in the GaN template obtained by this two-step growing method is subject to compressive strain or tensile strain due to the differences in growth conditions. As an example,
FIG. 11
shows the relationship between the a-axis lattice constant and the c-axis lattice constant in the GaN layer formed on a C-plane sapphire substrate. In
FIG. 11
, the vertical axis indicates the c-axis direction (the direction perpendicular to the substrate) and the horizontal axis indicates the a-axis direction (the direction parallel to the substrate). This figure indicates the lattice constant of a GaN layer that is subjected to elastic deformation due to lattice strain as it is formed on a sapphire substrate, by converting the lattice constant into an amount of lattice strain and comparing it to the bulk lattice constant of a free-standing GaN crystal.
The GaN layer formed on the sapphire substrate exhibits lattice strain because of differences in the coefficients of thermal expansion between the sapphire substrate and the GaN layer (sapphire: 7.75×10
−6
K
−1
, GaN: 5.59×10
−6
K
−1
) and in their growing mechanisms. This lattice strain varies depending on the difference in the growing conditions of the GaN layer, and either compressive or tensile elastic lattice strain is applied to the C-plane (substrate surface).
By increasing the crystal growth pressure of the GaN layer, for example, from a low-pressure (0.9 atm.) to a raised-pressure (1.6 atm.) atmosphere, it is possible to increase the compressive strain in the C-plane. Furthermore, if hydrogen (H
2
) is used as the carrier gas during GaN crystal growth, compressive stain occurs in the C-plane, while, on the other hand, if nitrogen (N
2
) is used, tensile strain occurs in the C-plane (raised-pressure growth: phys. stat. sol., (a) 176, 23 (1999), variation of carrier gas: Appl. Phys. Lett., VOL.75, NO.26, P4106-4108(1999)).
Heretofore, it has been known that the lattice strain applied to the GaN layer varies depending on the growth conditions as described above. However, the method for controlling the lattice strain has not been sufficiently investigated. This has resulted in threading dislocation in the GaN layer at high densities, reducing the fabrication yield. For example, it is known that in GaN layers grown on a sapphire substrate by known two-step growth methods, threading dislocation exists at a density of 1×10
8
cm
−2
to 1×10
10
cm
−2
; however, in order to improve device performance, the threading dislocation density should be reduced to about 1×10
5
cm
−2
. Therefore, the demand is growing for a technique to reduce threading dislocation density.
DISCLOSURE OF THE INVENTION
An object of the present invention is to provide a method for fabricating a nitride semiconductor device with high quality and high reliability.
The above object of the present invention can be achieved by a method for fabricating a nitride semiconductor device comprising the steps of forming a low-temperature deposited layer composed of a Group III-Group V nitride semiconductor that contains at least Al onto a surface of a substrate at a first temperature; subjecting the low-temperature deposited layer to heat treatment at a second temperature, which is higher than the first temperature, and converting the low-temperature deposited layer into a faceted layer; initially growing a GaN based semiconductor layer onto a surface of the faceted layer at a third temperature; and fully growing the GaN based semiconductor layer at a fourth temperature, which is lower than the third temperature.
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patent: 6408015 (2002-06-01), Kaneko
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Tadao Hashimoto et al., ‘Reduction of Threading Dislocations in GaN on Sapphirre by Buffer Layer Annealing in Low-Pressure Metalorganic Chemical Vapor Deposition’, Japanese Journal of Applied Physics, Part 1, Dec. 1999, vol. 38, No. 12A, pp. 6605 to 6610.
Takahiro Ito et al., ‘Influence of Thermal Annealin
Ishibashi Akihiko
Kawaguchi Yasutoshi
Tsujimura Ayumu
McDermott & Will & Emery
Trinh Michael
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