Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2006-05-09
2006-05-09
Graybill, David E. (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
Reexamination Certificate
active
07041569
ABSTRACT:
According to a disclosed embodiment, a composite MIM capacitor comprises a lower electrode of a lower MIM capacitor situated in a lower interconnect metal layer of a semiconductor die. The composite MIM capacitor further comprises an upper electrode of the lower MIM capacitor situated within a lower interlayer dielectric, where the lower interlayer dielectric separates the lower interconnect metal layer from an upper interconnect metal layer. A lower electrode of the upper MIM capacitor is situated in the upper interconnect metal layer. An upper electrode of the upper MIM capacitor is situated within the upper interlayer dielectric which is, in turn, situated over the upper interconnect metal layer. The upper electrode of the lower MIM capacitor is connected to the lower electrode of the upper MIM capacitor while the lower electrode of the lower MIM capacitor is connected to the upper electrode of the upper MIM capacitor.
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Howard David
Kar-Roy Arjun
Racanelli Marco
Farjami & Farjami LLP
Graybill David E.
Newport Fab LLC
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