Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2006-07-18
2006-07-18
Prenty, Mark V. (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C257S532000
Reexamination Certificate
active
07078310
ABSTRACT:
According to one embodiment, a structure comprises an electrode of a lower MIM capacitor situated in a first interconnect metal layer of a semiconductor die. The structure further comprises a shared electrode of the lower MIM capacitor and an upper MIM capacitor. The structure further comprises an electrode of the upper MIM capacitor situated over the shared electrode. The electrode of the upper MIM capacitor is coupled to the electrode of the lower MIM capacitor through vias and a second interconnect metal layer. In one embodiment, the electrode of the upper MIM capacitor can be divided into two or more segments to allow additional paths for connectivity to reduce the resistance of an electrode of the composite MIM capacitor. In other embodiments, a method for fabricating various embodiments of the composite MIM capacitor is disclosed.
REFERENCES:
patent: 6303957 (2001-10-01), Ohwa
patent: 6720655 (2004-04-01), Ahn et al.
patent: 6777777 (2004-08-01), Kar-Roy et al.
patent: 6838717 (2005-01-01), Yen et al.
patent: 2002/0056869 (2002-05-01), Morimoto
Kar-Roy Arjun
Kempf Paul
Racanelli Marco
Farjami & Farjami LLP
Newport Fab LLC
Prenty Mark V.
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