Method for fabricating a flip chip package

Details Method for fabricating a flip chip package Method for fabricating a flip chip package

2005-09-07

2008-11-18

Thai, Luan (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S737000, C257S738000, C257S780000, C257S779000, C257SE23021, C257SE23023

Reexamination Certificate

active

07453155

ABSTRACT:
A flip chip packaging method is disclosed. First, a substrate is provided, in which the substrate comprises a plurality of integrated circuit (IC) package substrate units therein and the surface of each IC package substrate unit comprises a plurality of connecting pads. Next, an insulating layer with patterns is formed on the substrate and the connecting pads and a plurality of openings by partially exposing the upper surface of the connecting pads. Next, a conductive material is disposed within each opening. Next, a plurality of chips is provided, in which a plurality of conductive bumps is formed over the bottom surface of the chip. Lastly, the chips are mounted over the surface of the IC package substrate unit and the substrate is separated into a plurality of flip chip package structures, in which the surface of each flip chip package structure includes at least one chip.

REFERENCES:
patent: 4818728 (1989-04-01), Rai et al.
patent: 6452280 (2002-09-01), Shiraishi et al.
patent: 6689639 (2004-02-01), Sakuyama et al.

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