Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1996-12-13
1999-09-14
Bowers, Charles
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
438455, 438458, 156281, H01L 21302, H01L 2134
Patent
active
059536209
ABSTRACT:
A method for fabricating a bonded SOI wafer is provided in which no void is produced during a waiting period from the completion of a bonding step to the start of a bonding thermal processing step without a special restriction. The method for fabricating a bonded SOI wafer includes a bonding step in which an active wafer, which has been single- or both-side mirror polished and thermal oxidation processed to form an insulating layer of a predetermined thickness, is pressed and bonded to a single- or both-side mirror polished base wafer; and a bonding thermal processing step for carrying out a bonding thermal processing for bonding the wafer, in which a hydrophobic processing step for the base wafer and a hydrophilic processing step for the active wafer are carried out before the bonding step.
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Fujimoto Kazuaki
Furukawa Hiroshi
Katou Hirotaka
Bowers Charles
Komatsu Electronics Metals Co. Ltd.
Sulsky Martin
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