Method for fabricating a BiCMOS device

Details Method for fabricating a BiCMOS device Method for fabricating a BiCMOS device

1989-05-17

1990-08-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 33, 437 34, 437 51, 437 56, 148DIG9, 357 42, 357 43, 156657, 156662, H01L 2100, H01L 2102, H01L 2122, H01L 21263

Patent

active

049506161

ABSTRACT:
This invention provides a method for fabricating a semiconductor device comprising the steps of forming buried layers on the silicon substrate; etching an epitaxial layer after said layer is grown up, the step further including the processes of etching selectively the silicon epitaxial layer of well region on which a high speed bipolar transistor is formed to be thin and keeping the silicon epitaxial layer of well region on which nMOS transistor is formed remained the same thickness as grown up; and forming a pMOS transistor, a nMOS transistor and a bipolar transistor. High efficiency and high integration is easily attained in fabricating the high speed bipolar transistor and high performance CMOS transistor on same chip and by reducing the difficulty in processing according to the method of present invention.

REFERENCES:
patent: 4346513 (1982-08-01), Nishizawa et al.
patent: 4425516 (1984-01-01), Wanlass
patent: 4475279 (1984-10-01), Gahle
patent: 4536945 (1985-08-01), Gray et al.
patent: 4628341 (1986-12-01), Thomas
patent: 4717680 (1988-01-01), Piotrowski
patent: 4727046 (1988-02-01), Tuntasood et al.
patent: 4734382 (1988-03-01), Krishna

Affiliated with

Also associated with

Rating

Method for fabricating a BiCMOS device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating a BiCMOS device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating a BiCMOS device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1677390